2025-12-04 03:31:10 [INFO] transceiver.py:125 Init transceiver 'BTS@172.18.168.20:5700'
2025-12-04 03:31:10 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5702 <-> R:172.18.168.20:5802)
2025-12-04 03:31:10 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5701 <-> R:172.18.168.20:5801)
2025-12-04 03:31:10 [INFO] transceiver.py:125 Init transceiver 'MS@172.18.168.22:6700'
2025-12-04 03:31:10 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:6702 <-> R:172.18.168.22:6802)
2025-12-04 03:31:10 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:6701 <-> R:172.18.168.22:6801)
2025-12-04 03:31:10 [INFO] transceiver.py:125 Init transceiver 'TRX1@172.18.168.20:5700/1'
2025-12-04 03:31:10 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5704 <-> R:172.18.168.20:5804)
2025-12-04 03:31:10 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5703 <-> R:172.18.168.20:5803)
2025-12-04 03:31:10 [INFO] transceiver.py:125 Init transceiver 'TRX2@172.18.168.20:5700/2'
2025-12-04 03:31:10 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5706 <-> R:172.18.168.20:5806)
2025-12-04 03:31:10 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5705 <-> R:172.18.168.20:5805)
2025-12-04 03:31:10 [INFO] transceiver.py:125 Init transceiver 'TRX3@172.18.168.20:5700/3'
2025-12-04 03:31:10 [DEBUG] data_if.py:31 Init TRXD interface (L:0.0.0.0:5708 <-> R:172.18.168.20:5808)
2025-12-04 03:31:10 [DEBUG] ctrl_if.py:29 Init TRXC interface (L:0.0.0.0:5707 <-> R:172.18.168.20:5807)
2025-12-04 03:31:10 [INFO] fake_trx.py:423 Init complete
2025-12-04 03:31:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:31:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:31:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:31:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:31:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:31:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:31:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:31:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 0 -> 1
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:31:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:31:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 0 -> 1
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:31:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:31:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 0 -> 1
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:31:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:31:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 0 -> 1
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:31:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:31:14 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:31:15 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:15 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:31:15 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:31:15 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:16 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:17 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:31:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:31:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:31:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:31:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:31:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:31:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:31:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:31:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:21 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:31:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:22 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:31:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:31:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:23 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:31:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:23 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:31:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:24 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:24 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:25 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:25 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:26 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:26 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:27 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:31:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:31:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:31:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:31:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:31:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:31:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:31:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:31:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:31:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:31:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:31:27 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:31:27 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2754 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:27 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2754 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:27 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2754 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:27 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2754 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:27 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2754 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:27 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2754 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:27 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2754 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:31:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:31:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:31:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:31:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:31:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:31:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:31:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:31:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:31:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:31:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:31:32 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:31:32 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:31:33 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:31:33 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
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2025-12-04 03:31:33 [DEBUG] clck_gen.py:102 IND CLOCK 204
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2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
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2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
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2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
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2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
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2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
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2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
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2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:31:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:31:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:31:33 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:31:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=312 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=312 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=312 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=312 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=312 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=312 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=312 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:31:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:31:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:31:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:31:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:31:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:31:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:31:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:31:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:31:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:31:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:31:38 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:31:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:31:39 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:31:39 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:31:39 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:31:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:31:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:31:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:31:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:31:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:31:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:31:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:31:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:31:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:31:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:31:39 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:31:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=129 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=129 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=129 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=129 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=129 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=129 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=130 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=130 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=130 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=130 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=130 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=130 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=130 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=130 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:31:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:31:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:31:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:31:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:31:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:31:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:31:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:31:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:31:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:31:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:31:44 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:31:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:31:45 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:31:45 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:31:45 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:31:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:31:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:31:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:31:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:31:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:31:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:31:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:31:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:31:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:31:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:31:45 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:31:45 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=109 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:45 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=109 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:45 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=109 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:45 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=109 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:45 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=109 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:45 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=109 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:45 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=109 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:31:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:31:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:31:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:31:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:31:50 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:31:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:31:50 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:50 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:31:50 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:31:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:31:50 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:31:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:31:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:31:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:31:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:31:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:31:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:31:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:31:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:31:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:31:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:31:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:31:55 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:31:55 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:31:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:31:56 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:31:56 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:31:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:56 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:31:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:31:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:31:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:31:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:31:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:31:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:31:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:31:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:31:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:31:56 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:31:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:31:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:31:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:31:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:31:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:31:57 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:31:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:31:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:31:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:31:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:31:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:31:58 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:31:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:31:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:31:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:31:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:31:59 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:31:59 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:31:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:31:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:31:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:31:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:32:00 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:32:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:00 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:32:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:32:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:32:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:32:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:32:01 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:32:01 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:32:02 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:32:02 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:32:02 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:32:03 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:32:03 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:32:04 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:04 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:32:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:05 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:32:05 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:32:06 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:32:06 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:32:07 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:32:07 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:32:08 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:32:08 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:32:09 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:32:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:09 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:32:10 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:32:10 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:32:10 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:32:11 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:32:11 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:32:12 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:32:12 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2025-12-04 03:32:13 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2025-12-04 03:32:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:13 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2025-12-04 03:32:14 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2025-12-04 03:32:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:14 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2025-12-04 03:32:15 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2025-12-04 03:32:15 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2025-12-04 03:32:16 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2025-12-04 03:32:16 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2025-12-04 03:32:17 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2025-12-04 03:32:17 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2025-12-04 03:32:18 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2025-12-04 03:32:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:18 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2025-12-04 03:32:18 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2025-12-04 03:32:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:19 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2025-12-04 03:32:19 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2025-12-04 03:32:20 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2025-12-04 03:32:20 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2025-12-04 03:32:21 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2025-12-04 03:32:21 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2025-12-04 03:32:22 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2025-12-04 03:32:22 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2025-12-04 03:32:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2025-12-04 03:32:23 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2025-12-04 03:32:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2025-12-04 03:32:24 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2025-12-04 03:32:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:32:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:32:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:32:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:32:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:32:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:32:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:32:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:32:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:32:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:32:27 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2025-12-04 03:32:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:32:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:32:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:32:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:32:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:32:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:32:28 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2025-12-04 03:32:29 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2025-12-04 03:32:29 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2025-12-04 03:32:30 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2025-12-04 03:32:30 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2025-12-04 03:32:31 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2025-12-04 03:32:31 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2025-12-04 03:32:32 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2025-12-04 03:32:32 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2025-12-04 03:32:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:32 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:32:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:32:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:32:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:32:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:32:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:32:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:32:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:32:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:32:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:32:33 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:32:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:32:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:32:33 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:32:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:32:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:32:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:32:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:32:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:32:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:32:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:32:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:32:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:32:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:32:38 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:32:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:32:38 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:32:38 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:32:38 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:32:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:32:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:41 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:43 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:32:43 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:44 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:44 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:45 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:45 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:46 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:46 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:47 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:47 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:32:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:32:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:32:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:32:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:32:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:32:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:32:48 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:32:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:32:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2139 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:32:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2139 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:32:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2139 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:32:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2139 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:32:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2139 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:32:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2139 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:32:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:32:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:32:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:32:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:32:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:32:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:32:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:32:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:32:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:32:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:32:53 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:32:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:32:53 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:32:53 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:32:53 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:53 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:53 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:32:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:32:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:32:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:32:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:32:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:56 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:57 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:32:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:32:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:32:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:57 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:32:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:57 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:32:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:32:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:32:58 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:32:59 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:32:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:32:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:33:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:33:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:33:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:33:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:00 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:33:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:01 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:33:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:33:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:33:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:33:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:02 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:33:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:33:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:33:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:33:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:33:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:33:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:33:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:33:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:33:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:33:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:33:02 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:33:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:33:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:33:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:33:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:33:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:33:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:33:04 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:33:04 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:33:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:05 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:33:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:33:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:33:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:33:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:33:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:33:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:33:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:33:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:33:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:33:09 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:33:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:33:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:33:09 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:33:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:33:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:33:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:33:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:33:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:33:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:33:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:33:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:33:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:33:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:33:14 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:33:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:33:14 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:33:14 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:14 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:33:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:33:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:33:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:33:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:33:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:33:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:33:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:33:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:33:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:33:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:33:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:33:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:33:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:33:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:33:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:33:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:33:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:33:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:33:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:33:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:33:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:33:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:33:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:33:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:33:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:33:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:33:18 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:33:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:33:19 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:33:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:33:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:33:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:33:20 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:33:21 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:33:21 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:33:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:33:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:33:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:33:22 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:33:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:33:23 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:33:24 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:33:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:33:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:33:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:25 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:33:26 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:33:26 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:33:27 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:33:27 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:33:28 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:33:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:33:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:33:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:33:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:28 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:33:29 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:33:29 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:33:30 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:33:30 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:33:31 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2025-12-04 03:33:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:33:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:33:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:31 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2025-12-04 03:33:32 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2025-12-04 03:33:32 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2025-12-04 03:33:33 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2025-12-04 03:33:33 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2025-12-04 03:33:34 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2025-12-04 03:33:34 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2025-12-04 03:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:33:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:33:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:33:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:34 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2025-12-04 03:33:35 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2025-12-04 03:33:36 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2025-12-04 03:33:36 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2025-12-04 03:33:36 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2025-12-04 03:33:37 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2025-12-04 03:33:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:33:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:33:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:33:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:37 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2025-12-04 03:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2025-12-04 03:33:38 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2025-12-04 03:33:39 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2025-12-04 03:33:39 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2025-12-04 03:33:40 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2025-12-04 03:33:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:33:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:33:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:33:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:33:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:40 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2025-12-04 03:33:41 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2025-12-04 03:33:41 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2025-12-04 03:33:42 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2025-12-04 03:33:42 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2025-12-04 03:33:43 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2025-12-04 03:33:43 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2025-12-04 03:33:44 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2025-12-04 03:33:44 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2025-12-04 03:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:33:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:33:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:33:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:45 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:45 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:45 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2025-12-04 03:33:45 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2025-12-04 03:33:46 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2025-12-04 03:33:46 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2025-12-04 03:33:47 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2025-12-04 03:33:47 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2025-12-04 03:33:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:33:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:33:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:33:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:47 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2025-12-04 03:33:48 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2025-12-04 03:33:48 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2025-12-04 03:33:49 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2025-12-04 03:33:49 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2025-12-04 03:33:50 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2025-12-04 03:33:50 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2025-12-04 03:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:51 [WARNING] transceiver.py:250 (MS@172.18.168.22:6700) RX TRXD message (fn=8020 tn=1 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:33:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:33:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:33:51 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:33:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:51 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:51 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:52 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2025-12-04 03:33:52 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2025-12-04 03:33:53 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2025-12-04 03:33:53 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2025-12-04 03:33:54 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2025-12-04 03:33:54 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2025-12-04 03:33:54 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2025-12-04 03:33:55 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2025-12-04 03:33:55 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2025-12-04 03:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:33:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:33:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:33:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:56 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2025-12-04 03:33:56 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2025-12-04 03:33:57 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2025-12-04 03:33:57 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2025-12-04 03:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2025-12-04 03:33:58 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2025-12-04 03:33:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:33:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:33:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:33:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:33:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:33:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:33:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:33:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:33:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:33:59 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2025-12-04 03:33:59 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2025-12-04 03:34:00 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2025-12-04 03:34:00 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2025-12-04 03:34:01 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2025-12-04 03:34:01 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2025-12-04 03:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:34:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:34:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:34:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:02 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2025-12-04 03:34:02 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2025-12-04 03:34:02 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2025-12-04 03:34:03 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2025-12-04 03:34:03 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2025-12-04 03:34:04 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2025-12-04 03:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:34:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:34:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:34:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:04 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2025-12-04 03:34:05 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2025-12-04 03:34:05 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2025-12-04 03:34:06 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2025-12-04 03:34:06 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2025-12-04 03:34:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:34:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:34:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:34:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:07 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2025-12-04 03:34:07 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2025-12-04 03:34:08 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2025-12-04 03:34:08 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2025-12-04 03:34:09 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2025-12-04 03:34:09 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2025-12-04 03:34:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:34:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:34:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:34:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:10 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2025-12-04 03:34:10 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2025-12-04 03:34:10 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2025-12-04 03:34:11 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2025-12-04 03:34:11 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2025-12-04 03:34:12 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2025-12-04 03:34:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:34:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:34:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:34:12 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2025-12-04 03:34:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:13 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2025-12-04 03:34:13 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2025-12-04 03:34:14 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2025-12-04 03:34:14 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2025-12-04 03:34:15 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2025-12-04 03:34:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:34:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:34:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:34:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:34:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:34:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:34:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:34:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:34:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:34:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:34:15 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:34:15 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=13054 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:34:15 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=13054 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:34:15 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=13054 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:34:15 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=13054 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:34:15 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=13054 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:34:15 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=13054 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:34:15 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=13054 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:34:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:34:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:34:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:34:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:34:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:34:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:34:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:34:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:34:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:34:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:34:20 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:34:20 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:34:21 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:34:21 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:34:21 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:34:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:21 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:34:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:34:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:34:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:34:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:21 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:34:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:34:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:34:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:34:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:34:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:34:22 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:34:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:34:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:34:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:34:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:34:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:34:23 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:34:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:34:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:34:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:34:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:34:23 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:34:24 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:34:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:34:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:34:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:34:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:34:24 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:34:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:34:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:25 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:34:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:34:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:34:25 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:34:26 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:34:26 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:34:27 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:34:27 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:34:28 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:34:28 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:34:29 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:34:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:34:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:34:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:34:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:29 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:34:30 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:34:30 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:34:31 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:34:31 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:34:31 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:34:32 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:34:32 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:34:33 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:34:33 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:34:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:34:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:34:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:34:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:34 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:34:34 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:34:35 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:34:35 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:34:36 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:34:36 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:34:37 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:34:37 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2025-12-04 03:34:38 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2025-12-04 03:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:34:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:34:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:34:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:38 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2025-12-04 03:34:39 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2025-12-04 03:34:39 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2025-12-04 03:34:39 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2025-12-04 03:34:40 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2025-12-04 03:34:41 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2025-12-04 03:34:41 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2025-12-04 03:34:42 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2025-12-04 03:34:42 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2025-12-04 03:34:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:34:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:34:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:34:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:43 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2025-12-04 03:34:43 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2025-12-04 03:34:44 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2025-12-04 03:34:44 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2025-12-04 03:34:45 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2025-12-04 03:34:45 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2025-12-04 03:34:45 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2025-12-04 03:34:46 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2025-12-04 03:34:46 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2025-12-04 03:34:47 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2025-12-04 03:34:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:47 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:47 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:34:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:47 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:34:47 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:34:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:47 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:47 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:47 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:47 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2025-12-04 03:34:48 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2025-12-04 03:34:48 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2025-12-04 03:34:49 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2025-12-04 03:34:49 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2025-12-04 03:34:50 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2025-12-04 03:34:50 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2025-12-04 03:34:51 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2025-12-04 03:34:51 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2025-12-04 03:34:52 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2025-12-04 03:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:52 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:52 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:34:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:52 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:34:52 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:34:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:52 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:52 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:52 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:52 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2025-12-04 03:34:53 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2025-12-04 03:34:53 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2025-12-04 03:34:53 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2025-12-04 03:34:54 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2025-12-04 03:34:54 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2025-12-04 03:34:55 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2025-12-04 03:34:55 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2025-12-04 03:34:56 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2025-12-04 03:34:56 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2025-12-04 03:34:57 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2025-12-04 03:34:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:34:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:34:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:34:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:34:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:34:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:34:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:34:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:34:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:34:57 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2025-12-04 03:34:58 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2025-12-04 03:34:58 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2025-12-04 03:34:59 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2025-12-04 03:34:59 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2025-12-04 03:35:00 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2025-12-04 03:35:00 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2025-12-04 03:35:01 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2025-12-04 03:35:01 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2025-12-04 03:35:02 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2025-12-04 03:35:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:35:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:35:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:35:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:35:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:02 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2025-12-04 03:35:02 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2025-12-04 03:35:03 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2025-12-04 03:35:03 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2025-12-04 03:35:04 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2025-12-04 03:35:04 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2025-12-04 03:35:05 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2025-12-04 03:35:05 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2025-12-04 03:35:06 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2025-12-04 03:35:06 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2025-12-04 03:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:35:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:35:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:35:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:07 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2025-12-04 03:35:07 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2025-12-04 03:35:08 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2025-12-04 03:35:08 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2025-12-04 03:35:09 [DEBUG] clck_gen.py:102 IND CLOCK 10404
2025-12-04 03:35:09 [DEBUG] clck_gen.py:102 IND CLOCK 10506
2025-12-04 03:35:09 [DEBUG] clck_gen.py:102 IND CLOCK 10608
2025-12-04 03:35:10 [DEBUG] clck_gen.py:102 IND CLOCK 10710
2025-12-04 03:35:10 [DEBUG] clck_gen.py:102 IND CLOCK 10812
2025-12-04 03:35:11 [DEBUG] clck_gen.py:102 IND CLOCK 10914
2025-12-04 03:35:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:35:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:35:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:35:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:11 [DEBUG] clck_gen.py:102 IND CLOCK 11016
2025-12-04 03:35:12 [DEBUG] clck_gen.py:102 IND CLOCK 11118
2025-12-04 03:35:12 [DEBUG] clck_gen.py:102 IND CLOCK 11220
2025-12-04 03:35:13 [DEBUG] clck_gen.py:102 IND CLOCK 11322
2025-12-04 03:35:13 [DEBUG] clck_gen.py:102 IND CLOCK 11424
2025-12-04 03:35:14 [DEBUG] clck_gen.py:102 IND CLOCK 11526
2025-12-04 03:35:14 [DEBUG] clck_gen.py:102 IND CLOCK 11628
2025-12-04 03:35:15 [DEBUG] clck_gen.py:102 IND CLOCK 11730
2025-12-04 03:35:15 [DEBUG] clck_gen.py:102 IND CLOCK 11832
2025-12-04 03:35:16 [DEBUG] clck_gen.py:102 IND CLOCK 11934
2025-12-04 03:35:16 [DEBUG] clck_gen.py:102 IND CLOCK 12036
2025-12-04 03:35:17 [DEBUG] clck_gen.py:102 IND CLOCK 12138
2025-12-04 03:35:17 [DEBUG] clck_gen.py:102 IND CLOCK 12240
2025-12-04 03:35:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:35:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:35:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:35:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:18 [DEBUG] clck_gen.py:102 IND CLOCK 12342
2025-12-04 03:35:18 [DEBUG] clck_gen.py:102 IND CLOCK 12444
2025-12-04 03:35:18 [DEBUG] clck_gen.py:102 IND CLOCK 12546
2025-12-04 03:35:19 [DEBUG] clck_gen.py:102 IND CLOCK 12648
2025-12-04 03:35:19 [DEBUG] clck_gen.py:102 IND CLOCK 12750
2025-12-04 03:35:20 [DEBUG] clck_gen.py:102 IND CLOCK 12852
2025-12-04 03:35:20 [DEBUG] clck_gen.py:102 IND CLOCK 12954
2025-12-04 03:35:21 [DEBUG] clck_gen.py:102 IND CLOCK 13056
2025-12-04 03:35:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:35:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:35:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:35:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:21 [DEBUG] clck_gen.py:102 IND CLOCK 13158
2025-12-04 03:35:22 [DEBUG] clck_gen.py:102 IND CLOCK 13260
2025-12-04 03:35:22 [DEBUG] clck_gen.py:102 IND CLOCK 13362
2025-12-04 03:35:23 [DEBUG] clck_gen.py:102 IND CLOCK 13464
2025-12-04 03:35:23 [DEBUG] clck_gen.py:102 IND CLOCK 13566
2025-12-04 03:35:24 [DEBUG] clck_gen.py:102 IND CLOCK 13668
2025-12-04 03:35:24 [DEBUG] clck_gen.py:102 IND CLOCK 13770
2025-12-04 03:35:25 [DEBUG] clck_gen.py:102 IND CLOCK 13872
2025-12-04 03:35:25 [DEBUG] clck_gen.py:102 IND CLOCK 13974
2025-12-04 03:35:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:35:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:35:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:35:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:26 [DEBUG] clck_gen.py:102 IND CLOCK 14076
2025-12-04 03:35:26 [DEBUG] clck_gen.py:102 IND CLOCK 14178
2025-12-04 03:35:26 [DEBUG] clck_gen.py:102 IND CLOCK 14280
2025-12-04 03:35:27 [DEBUG] clck_gen.py:102 IND CLOCK 14382
2025-12-04 03:35:27 [DEBUG] clck_gen.py:102 IND CLOCK 14484
2025-12-04 03:35:28 [DEBUG] clck_gen.py:102 IND CLOCK 14586
2025-12-04 03:35:28 [DEBUG] clck_gen.py:102 IND CLOCK 14688
2025-12-04 03:35:29 [DEBUG] clck_gen.py:102 IND CLOCK 14790
2025-12-04 03:35:29 [DEBUG] clck_gen.py:102 IND CLOCK 14892
2025-12-04 03:35:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:35:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:30 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:35:30 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:35:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:30 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:30 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:30 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:30 [DEBUG] clck_gen.py:102 IND CLOCK 14994
2025-12-04 03:35:30 [DEBUG] clck_gen.py:102 IND CLOCK 15096
2025-12-04 03:35:31 [DEBUG] clck_gen.py:102 IND CLOCK 15198
2025-12-04 03:35:31 [DEBUG] clck_gen.py:102 IND CLOCK 15300
2025-12-04 03:35:32 [DEBUG] clck_gen.py:102 IND CLOCK 15402
2025-12-04 03:35:32 [DEBUG] clck_gen.py:102 IND CLOCK 15504
2025-12-04 03:35:33 [DEBUG] clck_gen.py:102 IND CLOCK 15606
2025-12-04 03:35:33 [DEBUG] clck_gen.py:102 IND CLOCK 15708
2025-12-04 03:35:34 [DEBUG] clck_gen.py:102 IND CLOCK 15810
2025-12-04 03:35:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:35:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:35:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:35:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:34 [DEBUG] clck_gen.py:102 IND CLOCK 15912
2025-12-04 03:35:34 [DEBUG] clck_gen.py:102 IND CLOCK 16014
2025-12-04 03:35:35 [DEBUG] clck_gen.py:102 IND CLOCK 16116
2025-12-04 03:35:35 [DEBUG] clck_gen.py:102 IND CLOCK 16218
2025-12-04 03:35:36 [DEBUG] clck_gen.py:102 IND CLOCK 16320
2025-12-04 03:35:36 [DEBUG] clck_gen.py:102 IND CLOCK 16422
2025-12-04 03:35:37 [DEBUG] clck_gen.py:102 IND CLOCK 16524
2025-12-04 03:35:37 [DEBUG] clck_gen.py:102 IND CLOCK 16626
2025-12-04 03:35:38 [DEBUG] clck_gen.py:102 IND CLOCK 16728
2025-12-04 03:35:38 [DEBUG] clck_gen.py:102 IND CLOCK 16830
2025-12-04 03:35:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:35:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:35:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 16932
2025-12-04 03:35:39 [DEBUG] clck_gen.py:102 IND CLOCK 17034
2025-12-04 03:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 17136
2025-12-04 03:35:40 [DEBUG] clck_gen.py:102 IND CLOCK 17238
2025-12-04 03:35:41 [DEBUG] clck_gen.py:102 IND CLOCK 17340
2025-12-04 03:35:41 [DEBUG] clck_gen.py:102 IND CLOCK 17442
2025-12-04 03:35:42 [DEBUG] clck_gen.py:102 IND CLOCK 17544
2025-12-04 03:35:42 [DEBUG] clck_gen.py:102 IND CLOCK 17646
2025-12-04 03:35:43 [DEBUG] clck_gen.py:102 IND CLOCK 17748
2025-12-04 03:35:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:35:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:35:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:35:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:43 [DEBUG] clck_gen.py:102 IND CLOCK 17850
2025-12-04 03:35:43 [DEBUG] clck_gen.py:102 IND CLOCK 17952
2025-12-04 03:35:44 [DEBUG] clck_gen.py:102 IND CLOCK 18054
2025-12-04 03:35:45 [DEBUG] clck_gen.py:102 IND CLOCK 18156
2025-12-04 03:35:45 [DEBUG] clck_gen.py:102 IND CLOCK 18258
2025-12-04 03:35:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:35:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:35:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:35:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:35:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:35:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:35:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:35:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:35:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:35:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:35:46 [DEBUG] clck_gen.py:102 IND CLOCK 18360
2025-12-04 03:35:46 [DEBUG] clck_gen.py:102 IND CLOCK 18462
2025-12-04 03:35:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:35:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:35:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:35:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:35:47 [DEBUG] clck_gen.py:102 IND CLOCK 18564
2025-12-04 03:35:47 [DEBUG] clck_gen.py:102 IND CLOCK 18666
2025-12-04 03:35:48 [DEBUG] clck_gen.py:102 IND CLOCK 18768
2025-12-04 03:35:48 [DEBUG] clck_gen.py:102 IND CLOCK 18870
2025-12-04 03:35:49 [DEBUG] clck_gen.py:102 IND CLOCK 18972
2025-12-04 03:35:49 [DEBUG] clck_gen.py:102 IND CLOCK 19074
2025-12-04 03:35:50 [DEBUG] clck_gen.py:102 IND CLOCK 19176
2025-12-04 03:35:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:50 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:35:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:35:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:35:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:35:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:35:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:35:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:35:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:35:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:35:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:35:52 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:35:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:35:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:35:52 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:35:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:35:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:35:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:35:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:35:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:35:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:35:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:35:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:35:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:35:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:35:57 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:35:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:35:57 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:35:57 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:57 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:35:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:58 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:35:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:35:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:35:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:35:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:35:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:35:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:35:59 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:35:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:35:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:35:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:35:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:35:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:36:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:00 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:36:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:36:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:36:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:36:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:36:01 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:36:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:02 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:36:02 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:36:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:03 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:36:03 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:36:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:36:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:04 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:36:04 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:36:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:05 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:36:05 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:36:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:36:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:06 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:36:06 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:36:07 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:07 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:07 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:07 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:07 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:07 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:07 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:36:08 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:08 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:36:08 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:36:09 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:36:09 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:10 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:36:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:10 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:10 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:10 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:10 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:10 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:10 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:10 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:10 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:36:11 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:11 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:36:12 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:36:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:12 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:36:13 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:13 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:13 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:13 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:13 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:13 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:13 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:14 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2025-12-04 03:36:14 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:15 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2025-12-04 03:36:15 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:15 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:15 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:16 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2025-12-04 03:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:16 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2025-12-04 03:36:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:36:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:36:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:36:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:36:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:36:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:36:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:36:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:36:16 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:36:16 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4281 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:16 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4281 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:16 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4281 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:16 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4281 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:16 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4281 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:16 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4281 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:36:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:36:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:36:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:36:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:36:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:36:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:36:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:36:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:36:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:36:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:36:21 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:36:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:36:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:36:22 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:36:22 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:36:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:22 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:36:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:36:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:36:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:36:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:36:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:36:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:36:23 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:36:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:36:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:36:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:36:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:36:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:36:24 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:36:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:36:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:36:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:36:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:36:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:36:25 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:36:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:25 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:36:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:36:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:36:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:36:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:36:26 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:36:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:26 [WARNING] transceiver.py:250 (MS@172.18.168.22:6700) RX TRXD message (fn=942 tn=5 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:26 [WARNING] transceiver.py:250 (MS@172.18.168.22:6700) RX TRXD message (fn=942 tn=6 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:26 [WARNING] transceiver.py:250 (MS@172.18.168.22:6700) RX TRXD message (fn=942 tn=7 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:26 [WARNING] transceiver.py:250 (MS@172.18.168.22:6700) RX TRXD message (fn=943 tn=0 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:26 [WARNING] transceiver.py:250 (MS@172.18.168.22:6700) RX TRXD message (fn=943 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:26 [WARNING] transceiver.py:250 (MS@172.18.168.22:6700) RX TRXD message (fn=943 tn=2 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:26 [WARNING] transceiver.py:250 (MS@172.18.168.22:6700) RX TRXD message (fn=943 tn=3 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:26 [WARNING] transceiver.py:250 (MS@172.18.168.22:6700) RX TRXD message (fn=943 tn=4 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:26 [WARNING] transceiver.py:250 (MS@172.18.168.22:6700) RX TRXD message (fn=943 tn=5 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:26 [WARNING] transceiver.py:250 (MS@172.18.168.22:6700) RX TRXD message (fn=943 tn=6 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:36:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:26 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:36:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:36:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:36:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:36:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:36:27 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:36:27 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:36:28 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:36:28 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:36:29 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:29 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:29 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:29 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:36:29 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:29 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:29 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:30 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:36:30 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:36:31 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:36:31 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:36:32 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:36:32 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:36:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:32 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:36:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:33 [WARNING] transceiver.py:250 (MS@172.18.168.22:6700) RX TRXD message (fn=2444 tn=6 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:33 [WARNING] transceiver.py:250 (MS@172.18.168.22:6700) RX TRXD message (fn=2444 tn=7 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:33 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:33 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:36:33 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:33 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:33 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:36:33 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:36:34 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:36:34 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:36:35 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:36:35 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:36:36 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:36:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:36 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:36:37 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:36:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:36:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:37 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:36:38 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:36:38 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:36:39 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2025-12-04 03:36:39 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2025-12-04 03:36:40 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2025-12-04 03:36:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:40 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2025-12-04 03:36:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:36:41 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2025-12-04 03:36:41 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:41 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:41 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:41 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2025-12-04 03:36:41 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2025-12-04 03:36:42 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2025-12-04 03:36:42 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2025-12-04 03:36:43 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2025-12-04 03:36:43 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2025-12-04 03:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:44 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2025-12-04 03:36:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:36:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:44 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2025-12-04 03:36:45 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2025-12-04 03:36:45 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2025-12-04 03:36:46 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2025-12-04 03:36:46 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2025-12-04 03:36:47 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2025-12-04 03:36:47 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:47 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2025-12-04 03:36:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:48 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:48 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:48 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:48 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:36:48 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:48 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:48 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:48 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2025-12-04 03:36:48 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2025-12-04 03:36:49 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2025-12-04 03:36:49 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2025-12-04 03:36:50 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2025-12-04 03:36:50 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2025-12-04 03:36:50 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2025-12-04 03:36:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:36:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:36:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:36:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:36:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:36:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:36:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:36:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:36:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:36:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:36:51 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6312 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6312 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6312 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6312 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6313 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6313 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6313 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6313 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6313 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6313 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6313 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6313 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6314 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6314 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6314 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6314 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6314 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6314 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6314 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6314 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6315 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6315 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6315 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6315 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6315 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6315 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6315 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=6315 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:36:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:36:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:36:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:36:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:36:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:36:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:36:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:36:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:36:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:36:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:36:56 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:36:56 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:36:56 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:36:56 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:36:56 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:36:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:36:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:36:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:36:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:36:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:36:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:36:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:36:57 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:36:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:36:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:36:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:36:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:36:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:36:58 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:36:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:36:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:36:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:36:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:36:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:36:59 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:36:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:00 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:37:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:37:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:37:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:37:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:37:00 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:37:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:00 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:37:00 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:37:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:37:00 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:00 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:01 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:37:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:37:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:37:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:37:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:37:01 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:37:02 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:37:02 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:37:02 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:37:03 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:37:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:03 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:37:04 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:37:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:37:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:37:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:37:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:37:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:37:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:37:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:04 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:37:05 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:37:05 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:37:06 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:37:06 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:37:07 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:37:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:07 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:37:08 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:37:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:37:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:37:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:37:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:37:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:08 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:37:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:09 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:37:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:37:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:37:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:37:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:37:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:37:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:09 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:37:10 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:37:10 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:37:10 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:37:11 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:37:11 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:37:12 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:37:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:12 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:37:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:37:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:37:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:37:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:37:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:13 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2025-12-04 03:37:13 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2025-12-04 03:37:14 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2025-12-04 03:37:14 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2025-12-04 03:37:15 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2025-12-04 03:37:15 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2025-12-04 03:37:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:16 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2025-12-04 03:37:16 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2025-12-04 03:37:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:37:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:37:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:37:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:37:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:37:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:37:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:17 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2025-12-04 03:37:17 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2025-12-04 03:37:18 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2025-12-04 03:37:18 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2025-12-04 03:37:18 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2025-12-04 03:37:19 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2025-12-04 03:37:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:19 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2025-12-04 03:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2025-12-04 03:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:37:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:20 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:37:20 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:37:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:37:20 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:20 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:20 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2025-12-04 03:37:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:21 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2025-12-04 03:37:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:37:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:37:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:37:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:37:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:37:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:21 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:37:21 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:37:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:37:21 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:21 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:21 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2025-12-04 03:37:22 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2025-12-04 03:37:22 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2025-12-04 03:37:23 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2025-12-04 03:37:23 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2025-12-04 03:37:24 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2025-12-04 03:37:24 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2025-12-04 03:37:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:37:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:37:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:37:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:37:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:25 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2025-12-04 03:37:25 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2025-12-04 03:37:26 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2025-12-04 03:37:26 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2025-12-04 03:37:27 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2025-12-04 03:37:27 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2025-12-04 03:37:27 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2025-12-04 03:37:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:37:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:37:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:37:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:28 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:37:28 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:37:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:37:28 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:28 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:28 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:28 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2025-12-04 03:37:28 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2025-12-04 03:37:29 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2025-12-04 03:37:29 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2025-12-04 03:37:30 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2025-12-04 03:37:30 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2025-12-04 03:37:31 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2025-12-04 03:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:37:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:37:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:37:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:37:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:31 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2025-12-04 03:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:32 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2025-12-04 03:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:37:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:37:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:37:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:32 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:37:32 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:37:32 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2025-12-04 03:37:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:37:32 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:32 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:33 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2025-12-04 03:37:33 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2025-12-04 03:37:34 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2025-12-04 03:37:34 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2025-12-04 03:37:35 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2025-12-04 03:37:35 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2025-12-04 03:37:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:36 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2025-12-04 03:37:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:37:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:37:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:37:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:37:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:37:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:37:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:36 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2025-12-04 03:37:37 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2025-12-04 03:37:37 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2025-12-04 03:37:38 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2025-12-04 03:37:38 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2025-12-04 03:37:39 [DEBUG] clck_gen.py:102 IND CLOCK 9180
2025-12-04 03:37:39 [DEBUG] clck_gen.py:102 IND CLOCK 9282
2025-12-04 03:37:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:37:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:37:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:37:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:37:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:39 [DEBUG] clck_gen.py:102 IND CLOCK 9384
2025-12-04 03:37:40 [DEBUG] clck_gen.py:102 IND CLOCK 9486
2025-12-04 03:37:40 [DEBUG] clck_gen.py:102 IND CLOCK 9588
2025-12-04 03:37:41 [DEBUG] clck_gen.py:102 IND CLOCK 9690
2025-12-04 03:37:41 [DEBUG] clck_gen.py:102 IND CLOCK 9792
2025-12-04 03:37:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:37:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:37:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:37:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:37:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:37:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:37:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:37:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:37:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:37:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:37:42 [DEBUG] clck_gen.py:102 IND CLOCK 9894
2025-12-04 03:37:43 [DEBUG] clck_gen.py:102 IND CLOCK 9996
2025-12-04 03:37:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:37:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:37:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:37:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:37:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:37:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:37:43 [DEBUG] clck_gen.py:102 IND CLOCK 10098
2025-12-04 03:37:44 [DEBUG] clck_gen.py:102 IND CLOCK 10200
2025-12-04 03:37:44 [DEBUG] clck_gen.py:102 IND CLOCK 10302
2025-12-04 03:37:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:37:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:37:44 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:37:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:37:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:37:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:37:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:37:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:37:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:37:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:37:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:37:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:37:48 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:37:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:37:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:37:48 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:37:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:37:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:37:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:37:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:37:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:37:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:37:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:37:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:37:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:37:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:37:53 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:37:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:37:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:37:54 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:37:54 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:37:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:37:54 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:37:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:37:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:37:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:37:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:37:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:37:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:37:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:37:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:37:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:37:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:37:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:37:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:37:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:37:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:37:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:37:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:37:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:37:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:37:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:37:56 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:37:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:37:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:37:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:37:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:37:56 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:37:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:37:57 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:37:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:37:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:37:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:37:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:37:57 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:37:58 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:37:58 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:37:59 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:37:59 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:38:00 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:38:00 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:38:01 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:38:01 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:38:02 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:38:02 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:38:03 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:38:03 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:38:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:38:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:38:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:38:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:38:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:38:03 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:38:03 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2174 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:38:03 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2175 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:03 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2175 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:03 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2175 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:03 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2175 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:03 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2175 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:03 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2175 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:03 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2175 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:03 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2175 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:03 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2176 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:03 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2176 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:03 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2176 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:03 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2176 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:03 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2176 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:03 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2176 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:03 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2176 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:03 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2176 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:38:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:38:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:38:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:38:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:38:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:38:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:38:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:38:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:38:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:38:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:38:08 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:38:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:38:09 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:38:09 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:38:09 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:38:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:38:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:38:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:38:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:38:11 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:38:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:12 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:38:12 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:38:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:13 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:38:13 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:38:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:14 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:38:14 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:38:15 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:38:15 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:38:15 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:38:16 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:38:16 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:38:17 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:38:17 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:38:18 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:38:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:38:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:38:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:38:18 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:38:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:38:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:38:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:38:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:38:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:38:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:38:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:38:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:38:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:38:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:38:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:38:23 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:38:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:38:24 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:38:24 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:38:24 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:38:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:24 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:38:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:38:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:25 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:38:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:38:26 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:38:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:26 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:38:27 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:38:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:27 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:38:28 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:38:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:28 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:38:29 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:38:29 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:38:30 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:38:30 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:38:31 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:38:31 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:38:31 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:38:32 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:38:32 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:38:33 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:38:33 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:38:34 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:38:34 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:38:35 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:38:35 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:38:36 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:38:36 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:38:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:38:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:38:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:38:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:38:36 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:38:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:38:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:38:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:38:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:38:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:38:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:38:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:38:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:38:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:38:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:38:41 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:38:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:38:42 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:38:42 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:38:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:42 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:38:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:38:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:38:43 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:38:43 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:38:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:43 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:38:44 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:38:44 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:38:44 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:38:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:45 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:38:45 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:38:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:46 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:38:46 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:38:46 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:38:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:46 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:38:47 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:38:47 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:38:47 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:38:47 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:38:47 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:38:48 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:38:48 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:38:49 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:38:49 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:38:49 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:38:50 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:38:50 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:38:51 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:38:51 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:38:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:38:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:38:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:38:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:38:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:38:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:38:51 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:38:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2207 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2207 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2207 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2207 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2207 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2207 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:38:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:38:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:38:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:38:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:38:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:38:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:38:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:38:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:38:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:38:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:38:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:38:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:38:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:38:57 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:38:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:38:57 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:38:57 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:38:57 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:38:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:38:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:38:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:38:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:39:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:39:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:39:00 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:39:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:39:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:39:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:39:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:39:00 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:39:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:39:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:39:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:39:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:39:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:39:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:39:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:39:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:39:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:39:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:39:05 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:39:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:39:05 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:39:05 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:39:05 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:39:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:39:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD HANDOVER
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:39:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:39:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:39:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:39:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:39:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:39:07 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:39:07 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:39:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:39:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:39:07 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:39:07 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=569 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:39:07 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=569 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:39:07 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=569 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:39:07 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=569 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:39:07 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=569 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:39:07 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=569 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:39:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:39:12 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:39:12 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:39:12 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:39:12 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:39:12 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:39:12 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:39:12 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:39:12 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:39:12 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:39:12 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:39:12 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:39:12 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:12 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:39:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:39:17 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:39:17 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:39:17 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:39:17 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:39:17 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:39:17 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:39:17 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:39:17 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:39:17 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:39:17 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:17 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:39:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:39:18 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:39:18 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:39:18 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:39:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:39:18 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:39:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:39:19 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:39:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:39:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:39:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:21 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:39:21 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:39:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:22 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:39:22 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:39:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:22 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:39:23 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:39:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:39:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:39:23 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:39:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:39:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:39:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:39:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:39:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:39:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:39:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:39:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:39:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:39:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:39:28 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:28 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:39:29 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:39:29 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:39:29 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:39:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:39:29 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:39:29 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:39:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:30 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:39:30 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:39:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:31 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:39:31 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:39:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:32 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:39:32 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:39:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:33 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:39:33 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:39:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:33 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:39:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:39:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:39:34 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:39:34 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1196 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:39:34 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1196 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:39:34 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1196 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:39:34 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1196 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:39:34 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1196 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:39:34 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1196 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:39:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:39:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:39:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:39:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:39:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:39:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:39:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:39:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:39:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:39:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:39:39 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:39:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:39:39 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:39:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:39:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:39:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:39:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:39:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:39:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:39:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:39:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:39:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:39:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:39:44 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:39:45 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:39:45 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:39:45 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:39:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:39:45 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:39:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:39:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:39:45 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:39:45 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:39:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:46 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:39:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:39:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:39:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:39:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:39:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:39:46 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:39:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:39:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:39:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:39:47 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:39:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:39:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:39:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:39:48 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:39:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:39:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:39:49 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:39:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:39:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:39:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:39:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:39:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:39:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:39:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:39:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:39:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:39:53 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:39:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:39:53 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:39:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:39:58 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:39:58 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:39:58 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:39:58 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:39:58 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:39:58 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:39:58 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:39:58 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:39:58 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:39:58 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:39:58 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:39:58 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:39:58 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:39:58 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:39:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:39:58 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:39:58 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:39:58 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:39:58 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:39:59 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:39:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:39:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:39:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:39:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:39:59 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:40:00 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:40:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:40:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:40:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:40:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:40:00 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:40:01 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:40:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:40:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:40:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:40:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:40:01 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:40:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:40:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:40:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:40:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:40:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:40:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:40:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:40:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:40:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:40:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:40:01 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:40:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:40:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=730 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=730 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=730 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=730 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=730 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=730 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=730 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=731 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=731 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=731 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=731 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=731 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=731 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=731 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=731 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=732 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=732 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=732 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=732 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=732 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=732 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=732 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:01 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=732 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:40:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:40:06 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:40:06 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:40:06 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:40:06 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:40:06 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:40:06 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:40:06 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:40:06 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:40:06 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:40:06 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:40:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:40:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:40:06 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:40:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:40:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:40:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:40:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:40:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:40:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:40:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:40:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:40:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:40:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:40:11 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:11 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:40:12 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:40:12 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:40:12 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:40:12 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:40:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:40:12 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:40:12 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:40:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:40:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:40:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:40:12 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:40:12 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:40:12 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:40:12 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:40:12 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:40:12 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:40:12 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:40:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:12 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:12 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:40:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:40:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:40:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:40:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:40:13 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:40:13 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:40:13 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:40:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:40:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:40:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:40:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:40:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:40:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:40:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:40:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:40:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:40:13 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:40:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:40:13 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=312 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:13 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=312 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:13 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=312 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:13 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=312 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:13 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=312 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:13 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=312 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:13 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=312 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:40:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:40:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:40:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:40:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:40:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:40:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:40:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:40:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:40:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:40:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:40:18 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:40:18 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:40:18 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:40:18 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:40:18 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:40:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:40:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:40:18 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:40:18 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:19 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:40:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:40:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:40:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:40:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:40:19 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:40:20 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:40:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:40:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:40:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:40:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:40:20 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:40:20 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:40:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:40:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:40:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:40:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:40:21 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:40:21 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:40:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:40:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:40:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:40:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:40:22 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:40:22 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:40:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:40:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:40:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:40:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:40:23 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:40:23 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:40:24 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:40:24 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:40:25 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:40:25 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:40:26 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:40:26 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:40:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:40:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:40:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:40:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:40:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:40:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:40:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:40:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:40:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:40:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:40:26 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:40:26 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:40:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:40:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:40:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:40:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:27 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:40:27 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:40:28 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:40:29 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:40:29 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:40:30 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:40:30 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:40:31 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:40:31 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:40:32 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:40:32 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:40:33 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:40:33 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:40:34 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:40:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:40:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:40:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:40:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:40:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:40:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:40:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:40:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:40:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:40:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:40:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:40:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:40:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:40:34 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:40:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:40:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:40:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:40:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:40:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:40:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:40:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:40:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:40:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:40:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:40:39 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:40:40 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:40:40 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:40:40 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:40:40 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:40:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:40:40 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:40:40 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:40:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:40:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:40:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:40:40 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:40:40 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:40:40 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:40:40 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:40:40 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:40:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:40:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:40:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:40:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:40:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:40:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:40:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:40:41 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:40:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:40:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:40:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:40:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:40:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:40:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:40:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:40:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:40:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:40:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:40:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:40:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:40:41 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:40:41 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=353 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:41 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=353 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:41 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=353 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:41 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=353 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:41 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=353 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:41 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=353 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:41 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=353 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:41 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=354 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:41 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=354 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:41 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=354 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:41 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=354 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:41 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=354 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:41 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=354 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:41 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=354 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:41 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=354 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:40:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:40:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:40:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:40:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:40:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:40:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:40:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:40:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:40:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:40:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:40:46 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:40:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:40:46 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:40:46 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:40:46 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:40:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:40:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:40:46 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:40:46 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:47 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:40:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:40:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:40:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:40:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:40:47 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:40:48 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:40:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:40:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:40:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:40:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:40:48 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:40:49 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:40:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:40:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:40:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:40:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:40:49 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:40:50 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:40:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:40:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:40:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:40:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:40:50 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:40:51 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:40:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:40:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:40:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:40:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:40:51 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:40:52 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:40:53 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:40:53 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:40:53 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:40:54 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:40:54 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:40:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:40:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:40:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:40:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:40:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:40:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:40:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:40:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:40:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:40:55 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:40:55 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:40:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:40:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:40:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:40:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:40:55 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:40:55 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:40:56 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:40:56 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:40:57 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:40:57 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:40:58 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:40:59 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:40:59 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:41:00 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:41:00 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:41:01 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:41:01 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:41:01 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:41:02 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:41:02 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:41:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:41:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:41:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:41:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:41:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:41:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:41:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:41:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:41:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:41:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:41:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:41:03 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:41:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:41:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:41:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:41:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:41:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:41:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:41:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:41:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:41:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:41:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:41:08 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:41:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:41:08 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:41:08 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:41:08 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:41:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:41:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:41:08 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:41:08 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:41:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:41:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:41:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:41:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:41:09 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:41:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:41:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:41:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:41:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:41:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:41:10 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:41:10 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:41:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:41:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:41:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:41:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:41:11 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:41:11 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:41:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:41:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:41:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:41:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:41:12 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:41:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:41:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:41:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:41:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:41:13 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:41:13 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:41:14 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:41:14 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:41:15 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:41:15 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:41:16 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:41:16 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:41:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:41:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:41:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:41:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:41:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:41:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:41:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:41:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:41:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:41:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:41:16 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:41:16 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:41:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:41:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:41:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:41:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:16 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:41:17 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:41:17 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:41:18 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:41:19 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:41:19 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:41:20 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:41:20 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:41:21 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:41:21 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:41:22 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:41:22 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:41:23 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:41:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:41:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:41:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:41:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:41:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:41:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:41:24 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:41:24 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:41:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:41:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:41:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:24 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2025-12-04 03:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2025-12-04 03:41:25 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2025-12-04 03:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2025-12-04 03:41:26 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2025-12-04 03:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2025-12-04 03:41:27 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2025-12-04 03:41:28 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2025-12-04 03:41:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:41:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:41:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:41:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:41:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:41:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:41:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:41:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:41:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:41:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:41:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:41:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:41:28 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:41:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4505 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:41:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4505 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:41:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4505 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:41:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4505 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:41:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4505 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:41:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4505 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:41:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4505 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:41:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:41:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:41:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:41:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:41:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:41:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:41:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:41:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:41:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:41:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:41:33 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:41:34 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:41:34 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:41:34 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:41:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:41:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:41:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:41:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:41:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:41:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:41:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:41:34 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:41:34 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:41:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:41:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:41:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:41:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:41:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:41:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:41:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:41:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:41:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:41:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:41:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:41:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:41:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:41:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:41:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:41:36 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:41:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:41:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:41:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:41:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:41:37 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:41:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:41:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:41:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:41:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:41:38 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:41:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:41:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:41:39 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:41:39 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:41:40 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:41:40 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:41:40 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:41:41 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:41:41 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:41:42 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:41:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:41:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:41:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:41:42 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:41:42 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:41:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:41:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:41:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:41:42 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:41:42 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:41:42 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:41:42 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:41:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:41:42 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:41:42 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:41:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:42 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:42 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:41:43 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:41:43 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:41:44 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:41:44 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:41:45 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:41:45 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:41:46 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:41:46 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:41:47 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:41:47 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:41:47 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:41:48 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:41:48 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:41:49 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:41:49 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:41:50 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:41:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:41:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:41:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:41:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:41:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:41:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:41:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:41:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:41:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:41:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:41:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:41:50 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:41:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:41:50 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=3607 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:41:50 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=3607 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:41:50 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=3607 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:41:50 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=3607 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:41:50 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=3607 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:41:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:41:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:41:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:41:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:41:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:41:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:41:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:41:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:41:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:41:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:41:55 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:41:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:41:55 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:41:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:42:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:42:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:42:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:42:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:42:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:42:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:42:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:42:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:42:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:42:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:42:00 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:00 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:42:01 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:42:01 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:42:01 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:42:01 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:42:01 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:42:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:42:01 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:42:01 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:42:01 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:42:01 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:42:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:42:01 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:42:01 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:01 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:42:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:42:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:42:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:42:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:42:01 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:42:02 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:42:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:42:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:42:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:42:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:42:02 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:42:03 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:42:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:42:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:42:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:42:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:42:03 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:42:04 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:42:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:42:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:42:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:42:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:42:04 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:42:05 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:42:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:42:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:42:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:42:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:42:05 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:42:06 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:42:06 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:42:07 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:42:07 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:42:08 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:42:08 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:42:09 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:42:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:42:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:42:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:42:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:42:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:42:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:42:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:42:09 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:42:09 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:42:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:42:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:42:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:09 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:42:09 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:42:10 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:42:10 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:42:11 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:42:11 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:42:12 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:42:12 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:42:13 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:42:13 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:42:14 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:42:14 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:42:15 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:42:15 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:42:16 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:42:16 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:42:16 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:42:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:42:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:42:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:42:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:42:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:42:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:42:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:42:17 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:42:17 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:42:17 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:42:17 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:42:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:42:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:42:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:42:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:17 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2025-12-04 03:42:17 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2025-12-04 03:42:18 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2025-12-04 03:42:18 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2025-12-04 03:42:19 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2025-12-04 03:42:19 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2025-12-04 03:42:20 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2025-12-04 03:42:20 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2025-12-04 03:42:21 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2025-12-04 03:42:21 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2025-12-04 03:42:22 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2025-12-04 03:42:22 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2025-12-04 03:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2025-12-04 03:42:23 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2025-12-04 03:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2025-12-04 03:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2025-12-04 03:42:24 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2025-12-04 03:42:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:42:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:42:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:42:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:42:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:42:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:42:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:42:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:42:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:42:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:42:25 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:42:25 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:42:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:42:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:42:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:42:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2025-12-04 03:42:25 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2025-12-04 03:42:26 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2025-12-04 03:42:26 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2025-12-04 03:42:27 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2025-12-04 03:42:27 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2025-12-04 03:42:28 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2025-12-04 03:42:28 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2025-12-04 03:42:29 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2025-12-04 03:42:29 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2025-12-04 03:42:30 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2025-12-04 03:42:30 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2025-12-04 03:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2025-12-04 03:42:31 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2025-12-04 03:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2025-12-04 03:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2025-12-04 03:42:32 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2025-12-04 03:42:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:42:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:42:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:42:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:42:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:42:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:42:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:42:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:42:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:42:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:42:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:42:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:42:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:42:33 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:42:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7104 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:42:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7104 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:42:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7104 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:42:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7104 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:42:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7104 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:42:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7104 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:42:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:42:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:42:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:42:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:42:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:42:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:42:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:42:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:42:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:42:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:42:38 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:42:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:42:38 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:42:38 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:42:38 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:42:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:42:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:42:38 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:42:38 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:42:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:42:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:42:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:42:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:42:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:42:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:42:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:42:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:42:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:42:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:42:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:42:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:42:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:42:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:42:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:42:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:42:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:42:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:42:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:42:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:42:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:42:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:42:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:42:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:42:43 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:42:43 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:42:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:42:44 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:42:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:42:45 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:42:46 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:42:46 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:42:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:42:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:42:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:42:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:42:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:42:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:42:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:42:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:42:46 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:42:46 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:42:46 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:42:46 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:42:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:42:46 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:42:46 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:42:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:46 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:42:47 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:42:47 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:42:48 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:42:48 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:42:49 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:42:49 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:42:50 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:42:50 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:42:50 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:42:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:42:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:42:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:42:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:42:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:42:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:42:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:42:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:42:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:42:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:42:51 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:42:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2911 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:42:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2911 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:42:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2911 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:42:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2911 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:42:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2911 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:42:51 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2911 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:42:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:42:56 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:42:56 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:42:56 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:42:56 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:42:56 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:42:56 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:42:56 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:42:56 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:42:56 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:42:56 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:42:56 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:42:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:42:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:42:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:42:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:42:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:42:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:42:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:42:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:42:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:42:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:42:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:42:57 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:42:57 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:42:57 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:42:57 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:42:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:42:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:42:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:42:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:42:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:42:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:43:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:43:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:43:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:43:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:43:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:43:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:43:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:43:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:43:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:43:03 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:43:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:43:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:43:03 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:43:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:43:08 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:43:08 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:43:08 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:43:08 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:43:08 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:43:08 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:43:08 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:43:08 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:43:08 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:43:08 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:08 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:43:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:43:09 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:43:09 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:43:09 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:43:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:43:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:43:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:43:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:43:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:43:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:43:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:43:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:43:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:43:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:43:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:43:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:43:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:43:09 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:43:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:09 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:43:10 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:43:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:10 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:43:11 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:43:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:11 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:43:12 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:43:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:12 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:43:13 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:43:13 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:43:14 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:43:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:43:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:43:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:43:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:43:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:43:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:43:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:43:14 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:43:15 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:43:15 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:43:15 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:43:15 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:43:15 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:43:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:43:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:43:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:43:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:43:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:43:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:43:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:43:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:43:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:43:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:43:19 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:43:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:43:19 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:43:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:43:24 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:43:24 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:43:24 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:43:24 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:43:24 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:43:24 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:43:24 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:43:24 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:43:24 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:43:24 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:43:24 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:43:24 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:43:24 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:43:24 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:43:24 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:43:24 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:43:24 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:43:25 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:43:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:25 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:43:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:43:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:26 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:43:27 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:43:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:27 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:43:28 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:43:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:28 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:43:29 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:43:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:29 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:43:30 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:43:30 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:43:30 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:43:31 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:43:31 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:43:32 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:43:32 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:43:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:43:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:43:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:43:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:43:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:43:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:43:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:43:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:43:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:43:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:43:32 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:43:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:43:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:43:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:43:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:43:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:43:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:43:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:43:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:43:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:43:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:43:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:43:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:43:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:43:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:43:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:43:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:43:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:43:38 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:43:38 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:43:38 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:43:38 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:43:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:43:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:43:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:43:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:43:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:43:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:43:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:43:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:43:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:43:41 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:43:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:43:42 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:43:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:43 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:43:43 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:43:44 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:43:44 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:43:45 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:43:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:43:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:43:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:43:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:43:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:43:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:43:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:43:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:43:45 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:43:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:43:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:43:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:43:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:43:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:43:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:43:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:43:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:43:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:43:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:43:50 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:43:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:43:50 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:43:50 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:43:50 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:43:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:43:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:43:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:43:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:43:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:43:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:43:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:43:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:43:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:43:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:43:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:43:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:43:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:43:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:43:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:43:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:43:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:43:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:43:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:43:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:43:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:43:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:44:00 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:44:00 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:44:00 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:44:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:44:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:44:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:44:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:44:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:44:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:44:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:44:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:44:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:44:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:44:00 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:44:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:44:00 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:44:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:44:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:44:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:44:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:44:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:44:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:44:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:44:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:44:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:44:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:44:05 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:05 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:44:06 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:44:06 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:44:06 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:44:06 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:44:06 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:44:06 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:44:06 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:44:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:44:06 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:44:06 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:44:06 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:44:06 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:44:06 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:44:06 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:44:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:44:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:44:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:44:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:44:07 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:44:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:44:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:44:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:44:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:44:08 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:44:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:44:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:44:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:44:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:44:09 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:44:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:44:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:44:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:44:09 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:44:10 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:44:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:44:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:44:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:44:10 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:44:11 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:44:11 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:44:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:12 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:44:12 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:44:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:13 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:44:13 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:44:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:14 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:44:14 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:44:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:15 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:44:15 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:44:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:15 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:44:16 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:44:16 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:44:17 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:44:17 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:44:18 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:44:18 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:44:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:19 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:44:19 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:44:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:20 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:44:20 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:44:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:21 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:44:21 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:44:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:22 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:44:22 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2025-12-04 03:44:23 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2025-12-04 03:44:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:23 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2025-12-04 03:44:23 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2025-12-04 03:44:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:24 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2025-12-04 03:44:24 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2025-12-04 03:44:25 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2025-12-04 03:44:25 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2025-12-04 03:44:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:44:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:44:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:44:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:44:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:44:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:44:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:44:26 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:44:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:26 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4450 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:26 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4450 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:26 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4450 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:26 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4450 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:26 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4450 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:26 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4450 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:26 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4450 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:26 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=4450 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:44:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:44:31 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:44:31 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:44:31 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:44:31 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:44:31 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:44:31 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:44:31 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:44:31 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:44:31 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:44:31 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:44:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:44:31 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:44:31 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:44:31 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:44:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:44:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:44:31 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:44:31 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD NOHANDOVER
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:44:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=130 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=131 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=132 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=133 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=134 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=135 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=136 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=137 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=138 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=139 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=140 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=141 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=143 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=144 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=145 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=146 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=147 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=148 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=149 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=150 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=151 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=152 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=153 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=154 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=156 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=157 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=158 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=159 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=160 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=161 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=162 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=163 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=164 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=165 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=166 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=167 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:31 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=215 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=217 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=218 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:44:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:44:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:44:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD NOHANDOVER
2025-12-04 03:44:32 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:44:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:44:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:44:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:44:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:44:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:44:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:44:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:44:32 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:44:32 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=300 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:32 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=300 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:32 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=300 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:32 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=300 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:32 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=300 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:32 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=301 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:32 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=301 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:32 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=301 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:32 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=301 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:32 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=301 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:32 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=301 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:32 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=301 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:32 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=301 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:44:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:44:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:44:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:44:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:44:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:44:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:44:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:44:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:44:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:44:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:44:37 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:44:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:44:38 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:44:38 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:44:38 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:44:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:44:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:44:38 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:44:38 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD NOHANDOVER
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=169 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=170 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=171 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=172 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=173 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=174 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=175 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=176 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=177 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=178 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=179 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=180 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=182 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=183 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=184 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=185 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=186 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=187 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=188 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=189 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=190 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=191 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=192 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=193 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=195 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=196 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=197 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=198 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=199 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=200 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=201 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=202 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=203 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=204 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=205 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=206 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=208 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=209 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=210 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=211 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=212 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=213 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=214 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=215 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=216 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=217 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [ERROR] data_if.py:108 Failed to encode a TRXD message ('fn=218 tn=0 bl=148 rssi=-122 toa256=0') due to error: RSSI -122 is out of range
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD NOHANDOVER
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:44:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:44:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:44:38 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:44:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:44:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:44:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:44:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:44:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:44:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:44:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:44:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:44:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:44:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:44:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:44:44 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:44:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:44:44 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:44:44 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:44:44 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:44:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:44:44 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:44:44 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:44:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:44:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:44:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:44:45 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:44:45 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:44:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:44:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:44:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:44:46 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:44:46 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:44:47 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:44:47 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:47 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:44:47 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:44:47 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:44:47 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:44:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:44:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:44:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:44:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:44:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:44:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:44:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:44:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:44:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:44:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:48 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:44:49 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:44:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:44:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:44:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:49 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:44:50 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:44:50 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:44:50 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:44:51 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:44:51 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:44:52 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:44:53 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:44:53 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:44:53 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:44:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:44:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:44:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:44:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:44:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:44:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:44:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:44:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:44:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:44:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:44:54 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:44:54 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:44:55 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:44:55 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:44:56 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:44:56 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:44:57 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:44:57 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:44:58 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:44:59 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:44:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:44:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:44:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:44:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:44:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:44:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:44:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:44:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:44:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:44:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:44:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:44:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:44:59 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:45:00 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:45:00 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:45:00 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:45:01 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2025-12-04 03:45:01 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2025-12-04 03:45:02 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2025-12-04 03:45:02 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2025-12-04 03:45:03 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2025-12-04 03:45:03 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:45:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:45:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:45:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:45:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:45:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:45:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:45:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:45:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:45:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:45:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:45:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:04 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2025-12-04 03:45:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:45:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:45:04 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:45:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:45:09 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:45:09 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:45:09 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:45:09 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:45:09 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:45:09 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:45:09 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:45:09 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:45:09 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:45:09 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:45:09 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:45:09 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:45:09 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:45:09 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:45:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:45:09 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:45:09 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:45:09 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:45:10 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:45:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:45:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:45:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:45:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:45:10 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:45:11 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:45:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:45:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:45:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:45:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:45:11 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:45:12 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:45:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:45:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:45:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:45:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:45:12 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:45:13 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:45:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:45:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:45:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:45:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:45:13 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:45:14 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:45:14 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:45:15 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:45:15 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:45:16 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:45:16 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:45:16 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:45:17 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:45:17 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:45:18 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:45:18 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:45:19 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:45:19 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:45:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:45:20 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:45:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:45:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:45:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:45:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:45:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:45:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:45:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:45:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:45:20 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:45:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:45:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:45:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:45:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:45:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:45:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:45:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:45:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:45:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:45:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:45:25 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:45:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:45:25 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:45:25 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:45:25 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:45:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:45:25 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:45:25 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:45:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:45:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:45:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:45:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:45:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:45:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:45:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:45:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:45:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:45:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:45:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:45:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:45:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:45:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:45:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:45:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:45:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:45:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:45:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:45:29 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:45:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:45:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:45:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:45:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:45:29 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:45:29 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:45:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:45:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:45:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:45:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:45:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:45:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:45:30 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:45:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:45:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:45:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:34 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:45:34 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:45:35 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:45:35 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:45:36 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:45:36 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:45:36 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:45:37 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:45:37 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:45:38 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:45:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:45:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:45:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:45:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:45:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:45:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:45:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:45:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:45:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:45:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:45:38 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:45:39 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:45:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:45:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:45:39 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:45:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:45:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:45:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:45:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:45:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:45:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:45:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:45:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:45:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:45:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:45:43 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:45:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:45:43 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:45:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:45:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:45:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:45:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:45:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:45:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:45:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:45:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:45:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:45:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:45:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:45:48 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:45:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:45:49 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:45:49 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:45:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:45:49 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:45:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:45:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:45:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:45:49 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:45:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:45:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:45:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:45:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:45:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:45:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:45:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:45:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:45:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:45:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:45:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:45:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:45:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:45:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:45:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:45:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:45:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:45:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:45:51 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:45:51 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:45:51 [ERROR] ctrl_if_trx.py:101 (MS@172.18.168.22:6700) Transceiver already started
2025-12-04 03:45:51 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:45:51 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:45:51 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:45:55 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:45:55 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:45:55 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:45:55 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:45:55 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:45:55 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:45:55 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:45:55 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:45:55 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:45:55 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:45:55 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:45:55 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:45:55 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:46:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:46:00 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:46:00 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:46:00 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:46:00 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:46:00 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:46:00 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:46:00 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:46:00 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:46:00 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:46:00 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:46:00 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:46:00 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:46:00 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:46:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:46:05 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:46:05 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:46:05 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:46:05 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:46:05 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:46:05 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:46:05 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:46:05 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:46:05 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:46:05 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:46:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:46:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:46:05 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:46:10 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:46:10 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:46:10 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:46:10 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:46:10 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:46:10 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:46:10 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:46:10 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:46:10 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:46:10 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:46:10 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:10 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:46:11 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:46:11 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:46:11 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:46:11 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:46:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:46:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:46:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:46:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:46:11 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:46:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:46:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:46:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:46:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:46:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:46:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:46:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:46:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:11 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:46:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:12 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:46:12 [DEBUG] fake_trx.py:263 (MS@172.18.168.22:6700) Recv SETTA cmd
2025-12-04 03:46:12 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:46:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:46:13 [DEBUG] fake_trx.py:263 (MS@172.18.168.22:6700) Recv SETTA cmd
2025-12-04 03:46:13 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:46:13 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:13 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:13 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:13 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:46:14 [DEBUG] fake_trx.py:263 (MS@172.18.168.22:6700) Recv SETTA cmd
2025-12-04 03:46:14 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:46:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:46:15 [DEBUG] fake_trx.py:263 (MS@172.18.168.22:6700) Recv SETTA cmd
2025-12-04 03:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:46:15 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:46:16 [DEBUG] fake_trx.py:263 (MS@172.18.168.22:6700) Recv SETTA cmd
2025-12-04 03:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:46:16 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:46:16 [DEBUG] fake_trx.py:263 (MS@172.18.168.22:6700) Recv SETTA cmd
2025-12-04 03:46:17 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:46:17 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:46:17 [DEBUG] fake_trx.py:263 (MS@172.18.168.22:6700) Recv SETTA cmd
2025-12-04 03:46:18 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:46:18 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:46:18 [DEBUG] fake_trx.py:263 (MS@172.18.168.22:6700) Recv SETTA cmd
2025-12-04 03:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:46:19 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:46:19 [DEBUG] fake_trx.py:263 (MS@172.18.168.22:6700) Recv SETTA cmd
2025-12-04 03:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:46:20 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:46:20 [DEBUG] fake_trx.py:263 (MS@172.18.168.22:6700) Recv SETTA cmd
2025-12-04 03:46:21 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:46:21 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:46:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:46:21 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:21 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:46:21 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:46:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:46:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:46:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:46:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:46:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:46:21 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:46:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:46:26 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:46:26 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:46:26 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:46:26 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:46:26 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:46:26 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:46:26 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:46:26 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:46:26 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:46:26 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:46:26 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:26 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:46:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:46:27 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:46:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:46:27 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:46:27 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:46:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:46:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:46:27 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:46:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:46:27 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:46:27 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:46:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:46:27 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:46:27 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:46:27 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:27 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:46:27 [DEBUG] fake_trx.py:263 (MS@172.18.168.22:6700) Recv SETTA cmd
2025-12-04 03:46:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:28 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:46:28 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:46:28 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:46:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:46:29 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:46:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:46:30 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:46:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:46:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:31 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:46:32 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:46:33 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:46:33 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:46:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:46:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:46:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:46:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:46:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:46:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:46:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:46:34 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:46:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:46:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:46:34 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1560 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:46:34 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1560 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:46:34 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1560 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:46:34 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1560 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:46:34 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1560 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:46:34 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1560 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:46:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:46:39 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:46:39 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:46:39 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:46:39 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:46:39 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:46:39 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:46:39 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:46:39 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:46:39 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:46:39 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:46:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:46:39 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:46:39 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:46:39 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:46:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:46:39 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:46:39 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:40 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:46:40 [DEBUG] fake_trx.py:263 (MS@172.18.168.22:6700) Recv SETTA cmd
2025-12-04 03:46:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:46:40 [DEBUG] fake_trx.py:263 (MS@172.18.168.22:6700) Recv SETTA cmd
2025-12-04 03:46:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:46:40 [DEBUG] fake_trx.py:263 (MS@172.18.168.22:6700) Recv SETTA cmd
2025-12-04 03:46:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:46:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:46:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:42 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:46:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:46:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:43 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:46:43 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:46:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:44 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:46:44 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:46:45 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:46:46 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:46:46 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:46:47 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:46:47 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:46:47 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:46:48 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:46:48 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:46:49 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:46:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:46:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:46:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:46:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:46:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:46:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:46:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:46:49 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:46:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:46:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:46:49 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2296 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:46:49 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2296 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:46:49 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2296 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:46:49 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2296 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:46:49 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2296 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:46:49 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=2296 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:46:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:46:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:46:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:46:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:46:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:46:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:46:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:46:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:46:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:46:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:46:54 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:46:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:46:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:46:55 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:46:55 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:46:55 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:46:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:46:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:46:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:46:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:46:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:46:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:46:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:46:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:46:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:46:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:46:56 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:46:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:46:56 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:46:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:46:56 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:46:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:46:56 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=495 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:46:56 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=495 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:46:56 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=495 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:46:56 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=495 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:46:56 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=495 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:46:56 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=495 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:47:01 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:47:01 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:47:01 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:47:01 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:47:01 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:47:01 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:47:01 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:47:01 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:47:01 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:47:01 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:47:01 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:01 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:47:02 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:47:02 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:47:02 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:47:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:47:02 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:47:02 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:02 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:47:02 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:47:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:47:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:47:02 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:47:02 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=208 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:47:02 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=208 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:47:02 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=208 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:47:02 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=208 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:47:02 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=208 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:47:02 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=208 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:47:02 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=208 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:47:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:47:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:47:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:47:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:47:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:47:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:47:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:47:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:47:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:47:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:47:07 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:47:08 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:47:08 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:47:08 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:47:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:47:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:47:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:47:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:47:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:47:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:47:08 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:47:08 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:47:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:47:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:47:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:47:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:47:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:47:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:47:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:47:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:47:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:47:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:47:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:47:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:47:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:47:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:47:10 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:47:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:47:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:47:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:47:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:47:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:47:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:47:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:47:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:47:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:47:11 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:47:11 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:47:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:47:11 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:47:11 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:11 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:47:11 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:47:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:47:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:47:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:47:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:47:12 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:47:12 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:47:12 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:47:12 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:47:12 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:47:12 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:47:13 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:47:13 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:47:14 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:47:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:47:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:47:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:47:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:47:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:47:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:47:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:47:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:47:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:15 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:47:15 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:47:16 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:47:17 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:47:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:47:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:47:18 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:47:18 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:47:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:47:18 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:47:18 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:47:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:47:18 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:47:18 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:18 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:47:18 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:47:19 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:47:20 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:47:21 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:47:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:47:25 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:25 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:47:25 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:47:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:47:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:47:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:47:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:47:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:47:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:47:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:47:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:47:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:47:25 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:47:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:47:25 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=3808 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:47:25 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=3808 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:47:25 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=3808 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:47:25 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=3808 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:47:25 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=3808 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:47:25 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=3808 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:47:25 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=3808 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:47:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:47:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:47:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:47:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:47:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:47:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:47:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:47:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:47:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:47:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:47:30 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:30 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:47:31 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:47:31 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:47:31 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:47:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:47:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:47:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:47:31 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:31 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:47:31 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:47:31 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:47:31 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:47:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:47:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:47:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:47:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:47:31 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:47:32 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:47:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:47:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:47:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:47:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:47:32 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:47:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:47:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:47:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:47:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:47:33 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:47:34 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:47:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:47:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:47:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:47:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:47:34 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:47:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:47:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:47:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:47:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:47:35 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:47:36 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:47:36 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:47:37 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:47:37 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:47:38 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:47:39 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:47:40 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:47:41 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:47:41 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:47:42 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:47:42 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:47:43 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:47:43 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:47:44 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:47:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:47:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:47:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:47:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:47:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:47:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:47:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:47:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:47:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:47:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:47:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:47:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:47:45 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:47:47 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:47:47 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:47:47 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:47:47 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:47:47 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:47:47 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:47:52 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:47:52 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:47:52 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:47:52 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:47:52 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:47:52 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:47:52 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:47:52 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:47:52 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:47:52 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:47:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:47:52 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:47:52 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:47:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:47:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:47:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:47:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:47:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:47:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:47:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:47:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:47:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:47:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:47:57 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:47:57 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:47:57 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:47:57 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:47:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:47:57 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:57 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:47:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:47:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:47:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:47:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:47:58 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:47:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:47:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:47:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:47:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:47:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:59 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:47:59 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:47:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:47:59 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:47:59 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:47:59 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:47:59 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:47:59 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:47:59 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:48:00 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:48:00 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:48:00 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:48:00 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:48:00 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:48:01 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:48:01 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:48:01 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:48:01 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:48:01 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:48:02 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:48:03 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:48:03 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:48:04 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:48:04 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:48:05 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:48:05 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:48:05 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:48:06 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:48:06 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:48:07 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:48:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:48:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:48:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:48:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:48:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:48:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:48:07 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:48:08 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:48:08 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:48:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:48:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:48:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:09 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:48:09 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:48:10 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:48:11 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:48:12 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:48:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:48:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:48:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:48:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:48:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:48:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:48:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:48:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:48:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:48:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:48:13 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2025-12-04 03:48:14 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2025-12-04 03:48:14 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2025-12-04 03:48:15 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2025-12-04 03:48:16 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2025-12-04 03:48:16 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2025-12-04 03:48:17 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2025-12-04 03:48:17 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2025-12-04 03:48:17 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2025-12-04 03:48:18 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:48:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:48:18 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:48:18 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:48:18 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:48:18 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:48:18 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:48:18 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:48:18 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:48:18 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:48:18 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:48:18 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:48:18 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:18 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2025-12-04 03:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2025-12-04 03:48:19 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2025-12-04 03:48:20 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2025-12-04 03:48:20 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2025-12-04 03:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2025-12-04 03:48:21 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2025-12-04 03:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2025-12-04 03:48:22 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2025-12-04 03:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2025-12-04 03:48:23 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:48:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:48:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:48:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:48:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:48:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:48:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:48:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:48:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:48:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:48:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:23 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:48:23 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2025-12-04 03:48:24 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2025-12-04 03:48:25 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2025-12-04 03:48:25 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2025-12-04 03:48:26 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2025-12-04 03:48:26 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2025-12-04 03:48:26 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2025-12-04 03:48:27 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2025-12-04 03:48:27 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2025-12-04 03:48:28 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2025-12-04 03:48:28 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:48:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:48:28 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:48:28 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:48:28 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:48:28 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:48:28 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:48:28 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:48:28 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:48:28 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:48:28 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:48:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:28 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:29 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2025-12-04 03:48:29 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2025-12-04 03:48:30 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2025-12-04 03:48:30 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2025-12-04 03:48:31 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2025-12-04 03:48:31 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2025-12-04 03:48:32 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2025-12-04 03:48:32 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2025-12-04 03:48:33 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2025-12-04 03:48:33 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:48:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:48:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:48:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:48:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:48:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:48:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:48:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:48:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:48:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:48:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:48:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:34 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2025-12-04 03:48:34 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2025-12-04 03:48:34 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2025-12-04 03:48:35 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2025-12-04 03:48:35 [DEBUG] clck_gen.py:102 IND CLOCK 8364
2025-12-04 03:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 8466
2025-12-04 03:48:36 [DEBUG] clck_gen.py:102 IND CLOCK 8568
2025-12-04 03:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 8670
2025-12-04 03:48:37 [DEBUG] clck_gen.py:102 IND CLOCK 8772
2025-12-04 03:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 8874
2025-12-04 03:48:38 [DEBUG] clck_gen.py:102 IND CLOCK 8976
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:48:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:48:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:48:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:48:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:48:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:48:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:48:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:48:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:48:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:48:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:48:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:48:39 [DEBUG] clck_gen.py:102 IND CLOCK 9078
2025-12-04 03:48:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:48:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:48:39 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:48:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:48:43 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:48:43 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:48:43 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:48:43 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:48:43 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:48:43 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:48:43 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:48:43 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:48:43 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:48:43 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:43 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:48:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:48:44 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:48:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:48:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:48:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:48:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:48:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:48:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:48:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:48:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:48:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:48:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:48:49 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:48:49 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:48:49 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:48:49 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:48:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:48:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:48:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:48:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:48:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:48:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:48:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:48:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:48:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:48:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:48:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:48:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:48:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:48:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:48:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:48:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:48:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:48:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:48:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:48:52 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:48:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:48:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:48:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:48:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:48:53 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:48:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:48:54 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:48:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:48:55 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:48:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:48:56 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:48:56 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:48:57 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:48:57 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:48:58 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:48:58 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:48:59 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:48:59 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:49:00 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:49:00 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:49:01 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:49:01 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:49:02 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:49:03 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:49:04 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:49:05 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2025-12-04 03:49:06 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2025-12-04 03:49:06 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2025-12-04 03:49:07 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2025-12-04 03:49:07 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2025-12-04 03:49:08 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2025-12-04 03:49:08 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2025-12-04 03:49:09 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2025-12-04 03:49:09 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2025-12-04 03:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2025-12-04 03:49:10 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2025-12-04 03:49:11 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2025-12-04 03:49:11 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2025-12-04 03:49:12 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2025-12-04 03:49:12 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2025-12-04 03:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2025-12-04 03:49:13 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2025-12-04 03:49:14 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2025-12-04 03:49:14 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2025-12-04 03:49:14 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2025-12-04 03:49:15 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2025-12-04 03:49:15 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2025-12-04 03:49:16 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2025-12-04 03:49:16 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2025-12-04 03:49:17 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2025-12-04 03:49:17 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2025-12-04 03:49:18 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2025-12-04 03:49:18 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2025-12-04 03:49:19 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2025-12-04 03:49:19 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2025-12-04 03:49:20 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2025-12-04 03:49:20 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2025-12-04 03:49:21 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2025-12-04 03:49:21 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2025-12-04 03:49:22 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2025-12-04 03:49:22 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2025-12-04 03:49:23 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2025-12-04 03:49:23 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2025-12-04 03:49:23 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2025-12-04 03:49:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:49:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:49:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:49:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:49:24 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:49:24 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:49:24 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:49:24 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:49:24 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:49:24 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:49:24 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2025-12-04 03:49:25 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2025-12-04 03:49:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:49:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:49:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:49:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:49:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:49:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:49:25 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2025-12-04 03:49:26 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2025-12-04 03:49:26 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2025-12-04 03:49:27 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2025-12-04 03:49:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:49:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:49:27 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:49:30 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:49:30 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:49:30 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:49:30 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:49:30 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:49:30 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:49:30 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:49:30 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:49:30 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:49:30 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:49:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:49:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:49:30 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:49:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:49:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:49:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:49:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:49:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:49:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:49:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:49:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:49:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:49:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:49:35 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:49:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:49:36 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:49:36 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:49:36 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:49:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:49:36 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:49:36 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:49:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:49:36 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:49:36 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:49:36 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:49:36 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:49:36 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:49:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:49:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:49:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:49:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:49:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:49:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:49:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:49:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:49:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:49:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:49:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:49:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:49:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:49:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:49:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:49:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:49:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:49:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:49:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:49:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:49:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:49:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:49:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:49:40 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:49:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:49:41 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:49:41 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:49:42 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:49:42 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:49:43 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:49:43 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:49:44 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:49:44 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:49:45 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:49:45 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:49:46 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:49:46 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:49:47 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:49:47 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:49:47 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:49:48 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:49:48 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:49:49 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:49:49 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:49:50 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:49:50 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:49:51 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:49:51 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:49:52 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2025-12-04 03:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2025-12-04 03:49:53 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2025-12-04 03:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2025-12-04 03:49:54 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2025-12-04 03:49:55 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2025-12-04 03:49:55 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2025-12-04 03:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2025-12-04 03:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2025-12-04 03:49:56 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2025-12-04 03:49:57 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2025-12-04 03:49:57 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2025-12-04 03:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2025-12-04 03:49:58 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2025-12-04 03:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2025-12-04 03:49:59 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2025-12-04 03:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2025-12-04 03:50:00 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2025-12-04 03:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2025-12-04 03:50:01 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2025-12-04 03:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2025-12-04 03:50:02 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2025-12-04 03:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2025-12-04 03:50:03 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2025-12-04 03:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2025-12-04 03:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2025-12-04 03:50:04 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2025-12-04 03:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2025-12-04 03:50:05 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2025-12-04 03:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2025-12-04 03:50:06 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2025-12-04 03:50:07 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2025-12-04 03:50:07 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2025-12-04 03:50:08 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2025-12-04 03:50:08 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2025-12-04 03:50:09 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2025-12-04 03:50:09 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2025-12-04 03:50:10 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2025-12-04 03:50:10 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2025-12-04 03:50:11 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2025-12-04 03:50:11 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2025-12-04 03:50:12 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2025-12-04 03:50:12 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2025-12-04 03:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2025-12-04 03:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2025-12-04 03:50:13 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2025-12-04 03:50:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:50:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:50:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:50:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:50:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:50:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:50:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:50:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:50:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:50:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:50:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:50:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:50:14 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:50:19 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:50:19 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:50:19 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:50:19 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:50:19 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:50:19 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:50:19 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:50:19 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:50:19 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:50:19 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:50:19 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:50:19 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:50:19 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:50:19 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:50:19 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:50:19 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:50:19 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:50:19 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:50:20 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:50:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:50:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:50:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:50:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:50:20 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:50:21 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:50:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:50:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:50:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:50:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:50:21 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:50:22 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:50:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:50:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:50:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:50:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:50:22 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:50:23 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:50:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:50:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:50:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:50:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:50:23 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:50:24 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:50:24 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:50:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:50:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:50:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:50:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:50:24 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:50:25 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:50:25 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:50:26 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:50:26 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:50:27 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:50:27 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:50:28 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:50:28 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:50:29 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:50:29 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:50:30 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:50:30 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:50:31 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:50:31 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:50:32 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:50:32 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:50:32 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:50:33 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:50:34 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:50:34 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:50:35 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:50:35 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:50:36 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2025-12-04 03:50:36 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2025-12-04 03:50:37 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2025-12-04 03:50:37 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2025-12-04 03:50:38 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2025-12-04 03:50:38 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2025-12-04 03:50:39 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2025-12-04 03:50:39 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2025-12-04 03:50:40 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2025-12-04 03:50:40 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2025-12-04 03:50:40 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2025-12-04 03:50:41 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2025-12-04 03:50:41 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2025-12-04 03:50:42 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2025-12-04 03:50:42 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2025-12-04 03:50:43 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2025-12-04 03:50:43 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2025-12-04 03:50:44 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2025-12-04 03:50:44 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2025-12-04 03:50:45 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2025-12-04 03:50:45 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2025-12-04 03:50:46 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2025-12-04 03:50:46 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2025-12-04 03:50:47 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2025-12-04 03:50:47 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2025-12-04 03:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2025-12-04 03:50:48 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2025-12-04 03:50:49 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2025-12-04 03:50:49 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2025-12-04 03:50:50 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2025-12-04 03:50:50 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2025-12-04 03:50:50 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2025-12-04 03:50:51 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2025-12-04 03:50:51 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2025-12-04 03:50:52 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2025-12-04 03:50:52 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2025-12-04 03:50:53 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2025-12-04 03:50:53 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2025-12-04 03:50:54 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2025-12-04 03:50:54 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2025-12-04 03:50:55 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2025-12-04 03:50:55 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2025-12-04 03:50:56 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2025-12-04 03:50:56 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2025-12-04 03:50:57 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2025-12-04 03:50:57 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2025-12-04 03:50:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:50:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:50:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:50:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:50:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:50:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:50:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:50:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:50:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:50:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:50:57 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:50:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:50:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:50:57 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=8312 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:50:57 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=8312 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:50:57 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=8312 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:50:57 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=8312 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:50:57 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=8312 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:50:57 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=8312 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:50:57 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=8312 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:51:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:51:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:51:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:51:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:51:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:51:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:51:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:51:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:51:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:51:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:51:02 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:51:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:51:03 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:51:03 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:51:03 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:51:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:51:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:51:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:51:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:51:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:51:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:51:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:51:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:51:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:51:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:51:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:51:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:51:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:51:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:51:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:51:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:51:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:51:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:51:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:51:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:51:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:51:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:51:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:51:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:51:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:51:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:51:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:51:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:51:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:51:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:51:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:51:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:51:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:51:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:51:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:51:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:51:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:51:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:51:07 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:51:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:51:08 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:51:09 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:51:09 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:51:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:51:10 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:51:11 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:51:11 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:51:12 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:51:12 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:51:13 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:51:13 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:51:14 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:51:14 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:51:15 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:51:15 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:51:15 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:51:16 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:51:16 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:51:17 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:51:17 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:51:18 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:51:18 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:51:19 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:51:19 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2025-12-04 03:51:20 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2025-12-04 03:51:20 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2025-12-04 03:51:21 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2025-12-04 03:51:21 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2025-12-04 03:51:22 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2025-12-04 03:51:22 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2025-12-04 03:51:23 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2025-12-04 03:51:23 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2025-12-04 03:51:23 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2025-12-04 03:51:24 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2025-12-04 03:51:24 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2025-12-04 03:51:25 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2025-12-04 03:51:25 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2025-12-04 03:51:26 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2025-12-04 03:51:26 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2025-12-04 03:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2025-12-04 03:51:27 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2025-12-04 03:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2025-12-04 03:51:28 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2025-12-04 03:51:29 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2025-12-04 03:51:29 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2025-12-04 03:51:30 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2025-12-04 03:51:30 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2025-12-04 03:51:31 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2025-12-04 03:51:31 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2025-12-04 03:51:31 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2025-12-04 03:51:32 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2025-12-04 03:51:32 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2025-12-04 03:51:33 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2025-12-04 03:51:33 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2025-12-04 03:51:34 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2025-12-04 03:51:34 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2025-12-04 03:51:35 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2025-12-04 03:51:35 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2025-12-04 03:51:36 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2025-12-04 03:51:36 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2025-12-04 03:51:37 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2025-12-04 03:51:37 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2025-12-04 03:51:38 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2025-12-04 03:51:38 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2025-12-04 03:51:39 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2025-12-04 03:51:39 [DEBUG] clck_gen.py:102 IND CLOCK 7956
2025-12-04 03:51:39 [DEBUG] clck_gen.py:102 IND CLOCK 8058
2025-12-04 03:51:40 [DEBUG] clck_gen.py:102 IND CLOCK 8160
2025-12-04 03:51:40 [DEBUG] clck_gen.py:102 IND CLOCK 8262
2025-12-04 03:51:41 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:51:41 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:51:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:51:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:51:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:51:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:51:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:51:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:51:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:51:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:51:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:51:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:51:41 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:51:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:51:46 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:51:46 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:51:46 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:51:46 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:51:46 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:51:46 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:51:46 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:51:46 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:51:46 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:51:46 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:46 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:51:46 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:51:46 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:51:46 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:51:46 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:51:46 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:51:46 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:51:46 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:51:46 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:51:46 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:51:46 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:51:46 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:51:46 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:51:46 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:51:46 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:51:51 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:51:51 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:51:51 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:51:51 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:51:51 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:51:51 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:51:51 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:51:51 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:51:51 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:51:51 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:51:51 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:51 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:51:52 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:51:52 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:51:52 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:51:52 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:51:52 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:51:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:51:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:51:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:51:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:51:52 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:51:52 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:51:52 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:51:52 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:51:52 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:51:52 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:51:52 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:51:52 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=122 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:51:52 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=122 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:51:52 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=122 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:51:52 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=122 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:51:52 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=122 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:51:52 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=122 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:51:52 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=122 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:51:52 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=122 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:51:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:51:57 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:51:57 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:51:57 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:51:57 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:51:57 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:51:57 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:51:57 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:51:57 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:51:57 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:51:57 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:51:57 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:51:57 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:51:58 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:51:58 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:51:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:51:58 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:51:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:51:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:51:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:51:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:51:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:51:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:51:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:51:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:51:58 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:51:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:51:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:52:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:52:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:52:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:52:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:52:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:52:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:52:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:52:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:52:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:52:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:52:03 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:52:03 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:52:03 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:52:03 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:52:03 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:52:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:52:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:52:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:52:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:52:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:52:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:52:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:05 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:52:05 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:52:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:05 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:52:05 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:52:05 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:52:05 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:52:05 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:52:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:52:06 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:52:06 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:52:06 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:52:06 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:52:06 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:52:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:52:07 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:52:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:52:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:52:09 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:52:09 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:52:10 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:52:10 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:52:11 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:52:11 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:52:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:52:11 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:52:11 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:52:11 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:52:11 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:52:11 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:52:11 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:52:11 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:52:11 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:52:11 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:52:11 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:52:11 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:52:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:52:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:52:11 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:52:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:52:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:52:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:52:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:52:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:52:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:52:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:52:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:52:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:52:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:52:21 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:52:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:52:22 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:52:22 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:52:22 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:52:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:52:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:52:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:52:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:52:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:52:22 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:52:22 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:52:22 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:52:22 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:52:22 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:52:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:22 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:52:23 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:52:23 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:23 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:23 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:23 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:23 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:52:24 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:52:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:24 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:52:25 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:52:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:25 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:52:26 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:52:26 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:52:27 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:52:27 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:52:28 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:52:28 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:52:29 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:52:29 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:52:30 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:52:30 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:52:30 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:52:30 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:30 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:30 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:52:30 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:52:30 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:52:30 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:52:30 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:52:30 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:52:30 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:52:30 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1882 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:52:30 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1882 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:52:30 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1882 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:52:30 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1882 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:52:30 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1882 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:52:35 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:52:35 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:52:35 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:52:35 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:52:35 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:52:35 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:52:35 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:52:35 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:52:35 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:52:35 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:52:35 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:52:35 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:52:35 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:52:35 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:52:35 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:52:35 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:52:35 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:52:35 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:52:36 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:52:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:36 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:52:37 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:52:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:37 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:52:38 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:52:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:38 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:52:39 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:52:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:39 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:52:39 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:52:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:40 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:52:40 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:52:41 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:52:41 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:52:42 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:52:42 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:52:43 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:52:43 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:52:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:52:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:52:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:52:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:52:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:52:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:52:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:52:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:52:43 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:52:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:52:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:52:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:52:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:52:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:52:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:52:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:52:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:52:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:52:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:52:48 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:52:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:52:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:52:49 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:52:49 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:52:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:52:49 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:52:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:52:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:52:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:52:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:52:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:52:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:52:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:52:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:52:49 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:52:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:50 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:52:50 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:52:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:51 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:52:51 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:52:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:52 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:52:52 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:52:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:52:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:53 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:52:54 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:52:55 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:52:55 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:52:56 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:52:56 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:52:57 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:52:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:52:57 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:52:57 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:52:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:52:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:52:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:52:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:52:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:52:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:52:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:52:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:52:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:52:57 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:53:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:53:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:53:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:53:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:53:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:53:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:53:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:53:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:53:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:53:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:53:02 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:02 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:53:02 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:53:03 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:53:03 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:53:03 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:53:03 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:53:03 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:53:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:53:03 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:53:03 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:53:03 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:53:03 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:53:03 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:53:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:53:03 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:03 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:03 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:03 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:03 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:53:04 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:53:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:04 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:53:04 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:53:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:05 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:53:05 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:53:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:06 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:53:06 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:53:07 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:53:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:07 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:53:08 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:53:08 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:53:09 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:53:09 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:53:10 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:53:10 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:53:11 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:53:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:53:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:53:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:53:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:53:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:53:11 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:53:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:53:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:53:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:53:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:53:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:53:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:53:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:53:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:53:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:53:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:53:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:53:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:53:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:53:16 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:53:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:53:16 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:53:16 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:53:16 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:53:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:53:16 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:53:16 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:53:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:17 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:53:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:18 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:53:19 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:53:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:19 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:53:19 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:53:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:20 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:53:20 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:53:21 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:21 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:21 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:21 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:21 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:53:21 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:53:22 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:53:22 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:53:23 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:53:23 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:53:24 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:53:24 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:53:25 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:53:25 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:53:26 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:53:26 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:53:27 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:53:27 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:53:28 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:53:28 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:53:28 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:53:29 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:53:29 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:53:30 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:53:30 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:53:31 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:53:31 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:53:32 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:53:32 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:53:32 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:32 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:32 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:32 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:53:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:53:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:53:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:53:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:53:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:53:32 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:53:32 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:53:32 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:53:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:53:37 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:53:37 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:53:37 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:53:37 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:53:37 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:53:37 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:53:37 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:53:37 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:53:37 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:53:37 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:37 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:53:38 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:53:38 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:53:38 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:53:38 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:53:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:53:38 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:53:38 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:53:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:53:38 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:53:38 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:53:38 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:53:38 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:53:38 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:53:38 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:53:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:39 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:53:39 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:53:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:40 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:53:40 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:53:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:53:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:53:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:53:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:53:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:53:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:53:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:53:43 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:53:44 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:53:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:53:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:53:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:53:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:53:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:53:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:53:44 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:53:45 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:53:45 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:53:46 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:53:46 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:53:46 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:53:46 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:53:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:53:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:53:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:53:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:53:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:53:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:53:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:53:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:53:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:53:49 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:53:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:53:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:53:49 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:53:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:53:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:53:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:53:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:53:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:53:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:53:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:53:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:53:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:53:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:53:54 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:53:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:53:55 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:53:55 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:53:55 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:53:55 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:53:55 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:53:55 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:53:55 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:53:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:53:55 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:53:55 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:53:55 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:53:55 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:53:55 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:53:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:53:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:56 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:53:56 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:53:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:57 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:53:57 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:53:57 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:57 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:57 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:57 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:57 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:53:58 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:53:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:53:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:53:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:53:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:53:58 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:53:59 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:53:59 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:54:00 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:54:00 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:54:01 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:54:01 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:54:02 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:54:02 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:54:03 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:54:04 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:54:04 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:54:05 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:54:05 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:54:05 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:54:06 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:54:06 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:54:07 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:54:07 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:54:08 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:54:08 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:54:09 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:54:09 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:54:10 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:54:11 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:54:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:54:11 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:54:11 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:54:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:54:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:54:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:54:11 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:11 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:11 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:11 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:11 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:54:11 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:54:11 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:54:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:54:16 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:54:16 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:54:16 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:54:16 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:54:16 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:54:16 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:54:16 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:54:16 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:54:16 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:54:16 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:16 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:54:16 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:54:16 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:54:16 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:54:16 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:54:16 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:16 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:54:16 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:54:16 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:54:16 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:16 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:16 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:16 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:16 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:16 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:54:21 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:54:21 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:54:21 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:54:21 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:54:21 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:54:21 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:54:21 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:54:21 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:54:21 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:54:21 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:54:21 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:21 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:54:22 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:54:22 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:54:22 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:54:22 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:54:22 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:54:22 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:54:22 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:54:22 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:54:22 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:54:22 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:54:22 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:54:22 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:54:22 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:54:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:54:22 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:54:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:22 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=117 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:22 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=117 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:22 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=117 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:22 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=117 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:22 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=117 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:22 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=117 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:54:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:54:27 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:54:27 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:54:27 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:54:27 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:54:27 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:54:27 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:54:27 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:54:27 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:54:27 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:54:27 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:27 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:54:27 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:54:27 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:54:27 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:54:27 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:54:27 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:54:27 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:54:27 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:54:27 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:27 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:27 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:27 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:27 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:27 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:27 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:54:32 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:54:32 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:54:32 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:54:32 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:54:32 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:54:32 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:54:32 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:54:32 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:54:32 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:54:32 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:54:32 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:32 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:54:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:54:33 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:54:33 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:54:33 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:54:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:54:33 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:54:33 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:54:33 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:54:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:54:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:54:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:54:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:54:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:54:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:54:33 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:54:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=116 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=116 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=116 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=116 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=116 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=116 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=116 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:54:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:54:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:54:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:54:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:54:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:54:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:54:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:54:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:54:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:54:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:54:38 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:54:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:54:39 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:54:39 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:54:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:54:39 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:54:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:54:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:54:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:54:39 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:54:39 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:54:39 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:54:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:54:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:54:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:54:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:54:39 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:39 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:39 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:39 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:39 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:54:39 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:54:39 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:54:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=114 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=114 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=114 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:39 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:54:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:54:44 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:54:44 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:54:44 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:54:44 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:54:44 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:54:44 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:54:44 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:54:44 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:54:44 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:54:44 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:44 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:54:44 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:54:44 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:54:44 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:54:44 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:54:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:54:44 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:44 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:54:44 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:54:44 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:54:44 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:44 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:44 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:44 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:44 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:44 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=125 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:44 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=125 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:44 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=125 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:44 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=125 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:44 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=125 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:44 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=125 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:44 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=125 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:44 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=125 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:54:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:54:49 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:54:49 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:54:49 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:54:49 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:54:49 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:54:49 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:54:49 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:54:49 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:54:49 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:54:49 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:54:49 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:54:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:54:50 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:54:50 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:54:50 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:54:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:54:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:54:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:54:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:54:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:54:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:54:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:54:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:54:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:54:50 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:54:50 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:54:50 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:54:50 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:54:50 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:54:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:54:51 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:54:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:54:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:54:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:54:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:54:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:54:52 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:54:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:54:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:54:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:54:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:54:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:54:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:54:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:54:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:54:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:54:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:54:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:54:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:54:54 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:54:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:54:55 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:54:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:54:56 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:54:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:54:57 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:54:58 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:54:58 [DEBUG] clck_gen.py:102 IND CLOCK 1938
2025-12-04 03:54:59 [DEBUG] clck_gen.py:102 IND CLOCK 2040
2025-12-04 03:54:59 [DEBUG] clck_gen.py:102 IND CLOCK 2142
2025-12-04 03:55:00 [DEBUG] clck_gen.py:102 IND CLOCK 2244
2025-12-04 03:55:00 [DEBUG] clck_gen.py:102 IND CLOCK 2346
2025-12-04 03:55:01 [DEBUG] clck_gen.py:102 IND CLOCK 2448
2025-12-04 03:55:01 [DEBUG] clck_gen.py:102 IND CLOCK 2550
2025-12-04 03:55:02 [DEBUG] clck_gen.py:102 IND CLOCK 2652
2025-12-04 03:55:02 [DEBUG] clck_gen.py:102 IND CLOCK 2754
2025-12-04 03:55:02 [DEBUG] clck_gen.py:102 IND CLOCK 2856
2025-12-04 03:55:03 [DEBUG] clck_gen.py:102 IND CLOCK 2958
2025-12-04 03:55:03 [DEBUG] clck_gen.py:102 IND CLOCK 3060
2025-12-04 03:55:04 [DEBUG] clck_gen.py:102 IND CLOCK 3162
2025-12-04 03:55:04 [DEBUG] clck_gen.py:102 IND CLOCK 3264
2025-12-04 03:55:05 [DEBUG] clck_gen.py:102 IND CLOCK 3366
2025-12-04 03:55:05 [DEBUG] clck_gen.py:102 IND CLOCK 3468
2025-12-04 03:55:06 [DEBUG] clck_gen.py:102 IND CLOCK 3570
2025-12-04 03:55:06 [DEBUG] clck_gen.py:102 IND CLOCK 3672
2025-12-04 03:55:07 [DEBUG] clck_gen.py:102 IND CLOCK 3774
2025-12-04 03:55:07 [DEBUG] clck_gen.py:102 IND CLOCK 3876
2025-12-04 03:55:08 [DEBUG] clck_gen.py:102 IND CLOCK 3978
2025-12-04 03:55:08 [DEBUG] clck_gen.py:102 IND CLOCK 4080
2025-12-04 03:55:09 [DEBUG] clck_gen.py:102 IND CLOCK 4182
2025-12-04 03:55:09 [DEBUG] clck_gen.py:102 IND CLOCK 4284
2025-12-04 03:55:09 [DEBUG] clck_gen.py:102 IND CLOCK 4386
2025-12-04 03:55:10 [DEBUG] clck_gen.py:102 IND CLOCK 4488
2025-12-04 03:55:10 [DEBUG] clck_gen.py:102 IND CLOCK 4590
2025-12-04 03:55:11 [DEBUG] clck_gen.py:102 IND CLOCK 4692
2025-12-04 03:55:11 [DEBUG] clck_gen.py:102 IND CLOCK 4794
2025-12-04 03:55:12 [DEBUG] clck_gen.py:102 IND CLOCK 4896
2025-12-04 03:55:12 [DEBUG] clck_gen.py:102 IND CLOCK 4998
2025-12-04 03:55:13 [DEBUG] clck_gen.py:102 IND CLOCK 5100
2025-12-04 03:55:13 [DEBUG] clck_gen.py:102 IND CLOCK 5202
2025-12-04 03:55:14 [DEBUG] clck_gen.py:102 IND CLOCK 5304
2025-12-04 03:55:14 [DEBUG] clck_gen.py:102 IND CLOCK 5406
2025-12-04 03:55:15 [DEBUG] clck_gen.py:102 IND CLOCK 5508
2025-12-04 03:55:15 [DEBUG] clck_gen.py:102 IND CLOCK 5610
2025-12-04 03:55:16 [DEBUG] clck_gen.py:102 IND CLOCK 5712
2025-12-04 03:55:16 [DEBUG] clck_gen.py:102 IND CLOCK 5814
2025-12-04 03:55:17 [DEBUG] clck_gen.py:102 IND CLOCK 5916
2025-12-04 03:55:17 [DEBUG] clck_gen.py:102 IND CLOCK 6018
2025-12-04 03:55:18 [DEBUG] clck_gen.py:102 IND CLOCK 6120
2025-12-04 03:55:18 [DEBUG] clck_gen.py:102 IND CLOCK 6222
2025-12-04 03:55:19 [DEBUG] clck_gen.py:102 IND CLOCK 6324
2025-12-04 03:55:19 [DEBUG] clck_gen.py:102 IND CLOCK 6426
2025-12-04 03:55:19 [DEBUG] clck_gen.py:102 IND CLOCK 6528
2025-12-04 03:55:20 [DEBUG] clck_gen.py:102 IND CLOCK 6630
2025-12-04 03:55:20 [DEBUG] clck_gen.py:102 IND CLOCK 6732
2025-12-04 03:55:21 [DEBUG] clck_gen.py:102 IND CLOCK 6834
2025-12-04 03:55:21 [DEBUG] clck_gen.py:102 IND CLOCK 6936
2025-12-04 03:55:24 [DEBUG] clck_gen.py:102 IND CLOCK 7038
2025-12-04 03:55:24 [DEBUG] clck_gen.py:102 IND CLOCK 7140
2025-12-04 03:55:25 [DEBUG] clck_gen.py:102 IND CLOCK 7242
2025-12-04 03:55:25 [DEBUG] clck_gen.py:102 IND CLOCK 7344
2025-12-04 03:55:26 [DEBUG] clck_gen.py:102 IND CLOCK 7446
2025-12-04 03:55:26 [DEBUG] clck_gen.py:102 IND CLOCK 7548
2025-12-04 03:55:27 [DEBUG] clck_gen.py:102 IND CLOCK 7650
2025-12-04 03:55:27 [DEBUG] clck_gen.py:102 IND CLOCK 7752
2025-12-04 03:55:28 [DEBUG] clck_gen.py:102 IND CLOCK 7854
2025-12-04 03:55:28 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:55:28 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:55:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:55:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:55:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:55:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:55:28 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:55:28 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:55:28 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:55:28 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:55:28 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:55:28 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:55:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7877 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:28 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:55:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7877 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7877 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7877 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7877 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7877 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7878 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7878 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7878 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7878 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7878 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7878 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7878 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:28 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=7878 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:55:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:55:33 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:55:33 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:55:33 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:55:33 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:55:33 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:55:33 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:55:33 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:55:33 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:55:33 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:55:33 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:33 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:55:33 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:55:33 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:55:33 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:55:33 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:55:33 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:55:34 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:55:34 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:55:34 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:55:34 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:55:34 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:55:34 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:55:35 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:55:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:55:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:55:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:55:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:55:35 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:55:36 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:55:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:55:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:55:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:55:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:55:36 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:55:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:55:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:55:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:55:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:55:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:55:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:55:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:55:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:55:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:55:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:55:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:55:36 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:55:36 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=774 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:36 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=774 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:36 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=774 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:36 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=774 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:36 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=774 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:36 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=774 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:36 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=775 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:36 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=775 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:36 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=775 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:36 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=775 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:36 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=775 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:36 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=775 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:36 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=775 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:36 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=775 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:55:41 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:55:41 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:55:41 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:55:41 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:55:41 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:55:41 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:55:41 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:55:41 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:55:41 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:55:41 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:55:41 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:41 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:55:42 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:55:42 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:55:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:55:42 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:55:42 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:55:42 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:55:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:55:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:55:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:55:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:55:43 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:55:43 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:55:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:55:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:55:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:55:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:55:44 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:55:44 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:55:44 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:55:44 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:55:44 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:55:44 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:55:45 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:55:45 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:55:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:55:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:55:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:55:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:55:46 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:55:46 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:55:46 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:55:46 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:55:46 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:55:46 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:55:47 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:55:47 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:55:48 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:55:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:55:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:55:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:55:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:55:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:55:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:55:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:55:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:55:48 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:55:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1411 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1411 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1411 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1411 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1411 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1411 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:55:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:55:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:55:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:55:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:55:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:55:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:55:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:55:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:55:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:55:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:55:53 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:55:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:55:53 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:55:53 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:55:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:55:53 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:55:53 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:55:54 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:55:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:55:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:55:54 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:55:55 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:55:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:55:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:55:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:55:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:55:55 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:55:56 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:55:56 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:55:56 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:55:56 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:55:56 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:55:56 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:55:56 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:55:56 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:55:56 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:55:56 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:55:56 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:55:57 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:55:57 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:55:57 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:55:57 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:56:02 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:56:02 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:56:02 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:56:02 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:56:02 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:56:02 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:56:02 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:56:02 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:56:02 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:56:02 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:02 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:56:02 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:56:02 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:56:07 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:56:07 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:56:07 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:56:07 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:56:07 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:56:07 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:56:07 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:56:07 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:56:07 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:56:07 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:56:07 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:07 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:56:07 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:56:07 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:56:07 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:56:07 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:56:07 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:56:08 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:56:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:56:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:56:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:56:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:56:08 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:56:09 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:56:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:56:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:56:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:56:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:56:09 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:56:10 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:56:10 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:56:10 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:56:10 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:56:10 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:56:10 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:56:10 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:56:11 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:56:11 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:56:11 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:56:11 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:56:11 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:56:11 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:56:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:56:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:56:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:56:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:56:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:56:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:56:14 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:56:15 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:56:15 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:56:15 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:15 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:15 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:15 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:56:20 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:56:20 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:56:20 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:56:20 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:56:20 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:56:20 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:56:20 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:56:20 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:56:20 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:56:20 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:56:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:56:20 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:56:20 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:56:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:56:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:56:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:56:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:56:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:56:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:56:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:56:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:56:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:56:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:56:25 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:56:25 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:56:25 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:56:25 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:56:25 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:56:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:56:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:56:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:56:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:56:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:56:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:56:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:56:26 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:56:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:56:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:56:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:56:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:56:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:56:27 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:56:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:56:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:56:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:56:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:56:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:56:28 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:56:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:56:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:56:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:56:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:56:29 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:56:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:56:29 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:56:30 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:56:30 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:56:31 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:56:31 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:56:32 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:56:32 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:56:33 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:56:33 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:56:33 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:56:33 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:56:33 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:56:33 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:56:33 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:33 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:33 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:56:33 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:56:33 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:56:33 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:33 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1846 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1846 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1846 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1846 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1846 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1846 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1846 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:33 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1846 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:56:38 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:56:38 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:56:38 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:56:38 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:56:38 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:56:38 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:56:38 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:56:38 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:56:38 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:56:38 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:56:38 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:38 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:56:39 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:56:39 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:56:39 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:56:39 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:56:39 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:56:39 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:56:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:56:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:56:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:56:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:56:40 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:56:40 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:56:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:56:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:56:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:56:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:56:41 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:56:41 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:56:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:56:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:56:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:56:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:56:41 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:56:42 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:56:42 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:56:42 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:56:42 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:56:42 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:56:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:56:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:56:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:56:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:56:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:56:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:56:43 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:56:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:56:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:56:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:56:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:56:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:56:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:56:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:56:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:56:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:56:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:56:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:56:48 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:56:48 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:56:48 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:56:48 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:56:48 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:56:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:56:48 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:56:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:48 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:56:53 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:56:53 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:56:53 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:56:53 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:56:53 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:56:53 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:56:53 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:56:53 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:56:53 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:56:53 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:56:53 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:53 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:56:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:56:54 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:56:54 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:56:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:56:54 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:56:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:56:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:56:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:56:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:56:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:56:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:56:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:56:54 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:56:54 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=114 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:54 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=114 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:54 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=114 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:54 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=114 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:56:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:56:59 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:56:59 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:56:59 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:56:59 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:56:59 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:56:59 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:56:59 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:56:59 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:56:59 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:56:59 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:56:59 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:56:59 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:56:59 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:56:59 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:56:59 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:56:59 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:56:59 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:56:59 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:56:59 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:56:59 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:59 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:59 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:59 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=123 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:59 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=0 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:59 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=1 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:59 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:59 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:59 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:59 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:59 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:56:59 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=124 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:57:04 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:57:04 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:57:04 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:57:04 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:57:04 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:57:04 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:57:04 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:57:04 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:57:04 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:57:04 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:57:04 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:04 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:57:05 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:57:05 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:57:05 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:57:05 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:57:05 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:57:05 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:57:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:57:05 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:57:05 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:57:05 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:57:05 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:57:05 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:57:05 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:57:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:06 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:57:06 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:57:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:07 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:57:07 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:57:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:08 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:57:08 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:57:08 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:57:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:57:08 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:57:08 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:57:08 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:57:08 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:57:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:08 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:57:08 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:57:08 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:57:08 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:57:08 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:57:08 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:57:08 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:57:08 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=775 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:57:08 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=775 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:57:08 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=775 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:57:08 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=775 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:57:08 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=775 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:57:08 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=775 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:57:13 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:57:13 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:57:13 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:57:13 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:57:13 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:57:13 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:57:13 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:57:13 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:57:13 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:57:13 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:57:13 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:13 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:57:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:57:14 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:57:14 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:57:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:57:14 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:57:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:57:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:57:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:57:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:57:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:57:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:57:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:57:14 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:57:14 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:14 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:14 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:14 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:14 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:57:15 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:57:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:15 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:57:16 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:57:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:16 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:57:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:57:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:57:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:57:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:57:17 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:57:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:17 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:57:17 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:57:17 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:57:17 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:57:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:17 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:57:17 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:57:17 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:57:17 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:57:17 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:57:17 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:57:17 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:57:22 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:57:22 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:57:22 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:57:22 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:57:22 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:57:23 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:57:23 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:57:23 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:57:23 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:57:23 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:57:23 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:57:23 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:57:23 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:57:23 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:57:23 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:57:23 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:57:23 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:57:23 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:57:23 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:57:23 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:57:23 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:57:23 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:57:23 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:57:24 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:24 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:24 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:24 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:24 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:57:24 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:57:25 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:25 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:25 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:25 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:25 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:57:25 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:57:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:26 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:57:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:57:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:57:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:57:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:57:26 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:57:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:27 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:57:27 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:57:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:28 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:57:28 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:57:29 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:57:29 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:57:30 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:57:30 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:57:31 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:57:31 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:57:31 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:57:31 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:57:31 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:57:31 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:31 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:31 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:31 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:31 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:57:31 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:57:31 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:57:31 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:57:31 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:57:31 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:57:31 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:57:31 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1858 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:57:31 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1858 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:57:31 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1858 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:57:31 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1858 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:57:31 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1858 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:57:31 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1858 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:57:36 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:57:36 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:57:36 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:57:36 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:57:36 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:57:36 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:57:36 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:57:36 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:57:36 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:57:36 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:57:36 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:36 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:57:37 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:57:37 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:57:37 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:57:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:57:37 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:57:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:57:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:57:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:57:37 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:57:37 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:57:37 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:57:37 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:57:37 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:57:37 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:57:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:38 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:57:38 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:57:38 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:38 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:38 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:38 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:39 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:57:39 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:57:39 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:39 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:39 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:39 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:39 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:57:40 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:57:40 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:57:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:57:40 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:57:40 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:57:40 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:40 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:40 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:40 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:40 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:57:41 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:57:41 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:41 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:41 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:41 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:41 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:57:42 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:57:42 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:57:43 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:57:43 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:57:44 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:57:44 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:57:45 [DEBUG] clck_gen.py:102 IND CLOCK 1836
2025-12-04 03:57:45 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:57:45 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:57:45 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:57:45 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:45 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:45 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:45 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:45 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:57:45 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:57:45 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:57:45 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:57:45 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:57:45 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:57:45 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:57:50 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:57:50 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:57:50 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:57:50 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:57:50 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:57:50 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:57:50 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:57:50 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:57:50 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:57:50 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:57:50 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:57:50 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:57:50 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:57:50 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:57:50 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:57:50 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:57:50 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:57:50 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:57:51 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:57:51 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:51 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:51 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:51 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:51 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:57:52 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:57:52 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:52 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:52 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:52 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:52 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:57:53 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:57:53 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:53 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:53 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:53 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:53 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:57:53 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:57:53 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:57:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:57:53 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:57:53 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:57:54 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:54 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:54 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:54 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:54 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:57:54 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:55 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:57:55 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:57:56 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:57:56 [DEBUG] clck_gen.py:102 IND CLOCK 1428
2025-12-04 03:57:57 [DEBUG] clck_gen.py:102 IND CLOCK 1530
2025-12-04 03:57:57 [DEBUG] clck_gen.py:102 IND CLOCK 1632
2025-12-04 03:57:58 [DEBUG] clck_gen.py:102 IND CLOCK 1734
2025-12-04 03:57:58 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:57:58 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:57:58 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:57:58 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:57:58 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:57:58 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:57:58 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:57:58 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:57:58 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:57:58 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:57:58 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:57:58 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:57:58 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:57:58 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:57:58 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1836 tn=2 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:57:58 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1836 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:57:58 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1836 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:57:58 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1836 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:57:58 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1836 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:57:58 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1836 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:58:03 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:58:03 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:58:03 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:58:03 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:58:03 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:58:03 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:58:03 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:58:03 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:58:03 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:58:03 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:58:03 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:03 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:58:04 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:58:04 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:58:04 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:58:04 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:58:04 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:58:04 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:58:04 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:58:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:58:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:58:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:58:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:58:04 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:58:04 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:58:04 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:58:04 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:58:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:58:04 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:58:04 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:58:04 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:04 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:04 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:04 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:05 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:58:05 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:58:05 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:05 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:05 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:05 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:06 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:58:06 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:58:06 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:06 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:06 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:06 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:07 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:58:07 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:58:07 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:07 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:07 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:07 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:08 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:58:08 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:58:08 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:08 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:08 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:08 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:08 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:58:09 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:58:09 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:58:09 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:09 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:09 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:09 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:09 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:09 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:09 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:58:09 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:58:09 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:58:09 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:09 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:09 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1209 tn=3 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:58:09 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1209 tn=4 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:58:09 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1209 tn=5 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:58:09 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1209 tn=6 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:58:09 [WARNING] transceiver.py:250 (BTS@172.18.168.20:5700) RX TRXD message (ver=1 fn=1209 tn=7 bl=148 pwr=0), but transceiver is not running => dropping...
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:58:14 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:58:14 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:58:14 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:58:14 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:58:14 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:58:14 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:58:14 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:58:14 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:58:14 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:58:14 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:58:14 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:58:14 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:58:14 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:58:14 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:58:14 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:58:14 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:58:14 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:58:14 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:58:15 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:15 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:15 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:15 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:15 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:58:16 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:58:16 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:16 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:16 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:16 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:16 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:58:17 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:17 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:17 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:17 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:17 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:58:17 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:58:17 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:58:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:58:17 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:58:18 [DEBUG] clck_gen.py:102 IND CLOCK 816
2025-12-04 03:58:18 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:18 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:18 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:18 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:18 [DEBUG] clck_gen.py:102 IND CLOCK 918
2025-12-04 03:58:19 [DEBUG] clck_gen.py:102 IND CLOCK 1020
2025-12-04 03:58:19 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:19 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:19 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:19 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:19 [DEBUG] clck_gen.py:102 IND CLOCK 1122
2025-12-04 03:58:20 [DEBUG] clck_gen.py:102 IND CLOCK 1224
2025-12-04 03:58:20 [DEBUG] clck_gen.py:102 IND CLOCK 1326
2025-12-04 03:58:20 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:58:20 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:58:20 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:58:20 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:20 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:20 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:20 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:20 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:20 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:20 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:20 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:20 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:58:20 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:58:20 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:58:25 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:58:25 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:58:25 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:58:25 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:58:25 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:58:25 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:58:25 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:58:25 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:58:25 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:58:25 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:58:25 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:25 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:58:26 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:58:26 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:58:26 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:58:26 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:58:26 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:58:26 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:58:26 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:58:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:58:26 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:58:26 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:58:26 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:58:26 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:58:26 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:58:26 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:58:26 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:26 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:26 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:26 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:26 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:58:27 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:58:27 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:27 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:27 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:27 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:27 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:58:28 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:58:28 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:28 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:28 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:28 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:28 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:58:29 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:58:29 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:58:29 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:58:29 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:29 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:29 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:29 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:29 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:29 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:29 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:29 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:29 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:58:29 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:58:29 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:58:34 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:58:34 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:58:34 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:58:34 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:58:34 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:58:34 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:58:34 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:58:34 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:58:34 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:58:34 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:58:34 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:58:34 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:58:34 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:58:34 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:58:34 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:58:34 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:58:34 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:58:34 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:58:35 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:58:35 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:35 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:35 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:35 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:35 [DEBUG] clck_gen.py:102 IND CLOCK 306
2025-12-04 03:58:36 [DEBUG] clck_gen.py:102 IND CLOCK 408
2025-12-04 03:58:36 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:36 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:36 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:36 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:36 [DEBUG] clck_gen.py:102 IND CLOCK 510
2025-12-04 03:58:36 [DEBUG] clck_gen.py:102 IND CLOCK 612
2025-12-04 03:58:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:37 [DEBUG] clck_gen.py:102 IND CLOCK 714
2025-12-04 03:58:37 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:58:37 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:58:37 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:58:37 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:37 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:37 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:37 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:37 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:37 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:37 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:37 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:37 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:58:37 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:58:37 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:58:42 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:58:42 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:58:42 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:58:42 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:58:42 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:58:42 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:58:42 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:58:42 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:58:42 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:58:42 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:58:42 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:42 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:58:43 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:58:43 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:58:43 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:58:43 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:58:43 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:58:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:58:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:58:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:58:43 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:58:43 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:58:43 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:58:43 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:58:43 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:58:43 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:58:43 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:58:43 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:43 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:43 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:43 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:43 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:43 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:43 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:43 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:58:43 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:58:43 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:58:43 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:58:48 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:58:48 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:58:48 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:58:48 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:58:48 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:58:48 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:58:48 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:58:48 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:58:48 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:58:48 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:58:48 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:48 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:58:49 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:58:49 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:58:49 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:58:49 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:58:49 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:58:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:58:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:58:49 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:58:49 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:58:49 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:58:49 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:58:49 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:58:49 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:58:49 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:58:49 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:49 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:49 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:49 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd
2025-12-04 03:58:49 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:49 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:49 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:58:49 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:58:49 [INFO] transceiver.py:239 Stopping clock generator
2025-12-04 03:58:49 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:49 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:115 (BTS@172.18.168.20:5700) Recv POWEROFF cmd
2025-12-04 03:58:54 [INFO] ctrl_if_trx.py:117 (BTS@172.18.168.20:5700) Stopping transceiver...
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:220 (BTS@172.18.168.20:5700) Recv RFMUTE cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:58:54 [WARNING] ctrl_if_trx.py:196 (BTS@172.18.168.20:5700) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:182 (BTS@172.18.168.20:5700) Recv SETFORMAT cmd
2025-12-04 03:58:54 [INFO] ctrl_if_trx.py:201 (BTS@172.18.168.20:5700) TRXD header version 1 -> 1
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:124 (TRX1@172.18.168.20:5700/1) Recv RXTUNE cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:131 (TRX1@172.18.168.20:5700/1) Recv TXTUNE cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:58:54 [WARNING] ctrl_if_trx.py:196 (TRX1@172.18.168.20:5700/1) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:220 (TRX1@172.18.168.20:5700/1) Recv RFMUTE cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:215 (TRX1@172.18.168.20:5700/1) Recv NOMTXPOWER cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:182 (TRX1@172.18.168.20:5700/1) Recv SETFORMAT cmd
2025-12-04 03:58:54 [INFO] ctrl_if_trx.py:201 (TRX1@172.18.168.20:5700/1) TRXD header version 1 -> 1
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:124 (TRX2@172.18.168.20:5700/2) Recv RXTUNE cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:131 (TRX2@172.18.168.20:5700/2) Recv TXTUNE cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:58:54 [WARNING] ctrl_if_trx.py:196 (TRX2@172.18.168.20:5700/2) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:220 (TRX2@172.18.168.20:5700/2) Recv RFMUTE cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:215 (TRX2@172.18.168.20:5700/2) Recv NOMTXPOWER cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:182 (TRX2@172.18.168.20:5700/2) Recv SETFORMAT cmd
2025-12-04 03:58:54 [INFO] ctrl_if_trx.py:201 (TRX2@172.18.168.20:5700/2) TRXD header version 1 -> 1
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:124 (TRX3@172.18.168.20:5700/3) Recv RXTUNE cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:131 (TRX3@172.18.168.20:5700/3) Recv TXTUNE cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:58:54 [WARNING] ctrl_if_trx.py:196 (TRX3@172.18.168.20:5700/3) Requested TRXD header version 2 is not supported, suggesting 1...
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:220 (TRX3@172.18.168.20:5700/3) Recv RFMUTE cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:215 (TRX3@172.18.168.20:5700/3) Recv NOMTXPOWER cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:182 (TRX3@172.18.168.20:5700/3) Recv SETFORMAT cmd
2025-12-04 03:58:54 [INFO] ctrl_if_trx.py:201 (TRX3@172.18.168.20:5700/3) TRXD header version 1 -> 1
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:124 (BTS@172.18.168.20:5700) Recv RXTUNE cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETTSC
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETTSC
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETTSC
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:131 (BTS@172.18.168.20:5700) Recv TXTUNE cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETRXGAIN
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETRXGAIN
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETRXGAIN
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETTSC
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:215 (BTS@172.18.168.20:5700) Recv NOMTXPOWER cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:97 (BTS@172.18.168.20:5700) Recv POWERON CMD
2025-12-04 03:58:54 [INFO] ctrl_if_trx.py:109 (BTS@172.18.168.20:5700) Starting transceiver...
2025-12-04 03:58:54 [INFO] transceiver.py:236 Starting clock generator
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETRXGAIN
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX1@172.18.168.20:5700/1) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX2@172.18.168.20:5700/2) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (TRX3@172.18.168.20:5700/3) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 0
2025-12-04 03:58:54 [DEBUG] clck_gen.py:102 IND CLOCK 102
2025-12-04 03:58:54 [DEBUG] fake_trx.py:272 (BTS@172.18.168.20:5700) Recv FAKE_TOA cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (BTS@172.18.168.20:5700) Ignore CMD NOHANDOVER
2025-12-04 03:58:54 [DEBUG] fake_trx.py:291 (BTS@172.18.168.20:5700) Recv FAKE_RSSI cmd
2025-12-04 03:58:54 [DEBUG] fake_trx.py:316 (BTS@172.18.168.20:5700) Recv FAKE_CI cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:115 (MS@172.18.168.22:6700) Recv POWEROFF cmd
2025-12-04 03:58:54 [INFO] ctrl_if_trx.py:117 (MS@172.18.168.22:6700) Stopping transceiver...
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD ECHO
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:229 (MS@172.18.168.22:6700) Ignore CMD SETSLOT
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:124 (MS@172.18.168.22:6700) Recv RXTUNE cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:131 (MS@172.18.168.22:6700) Recv TXTUNE cmd
2025-12-04 03:58:54 [DEBUG] ctrl_if_trx.py:97 (MS@172.18.168.22:6700) Recv POWERON CMD
2025-12-04 03:58:54 [INFO] ctrl_if_trx.py:109 (MS@172.18.168.22:6700) Starting transceiver...
2025-12-04 03:58:55 [DEBUG] clck_gen.py:102 IND CLOCK 204
2025-12-04 03:58:55 [DEBUG] ctrl_if_trx.py:207 (BTS@172.18.168.20:5700) Recv SETPOWER cmd
2025-12-04 03:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX1@172.18.168.20:5700/1) Recv SETPOWER cmd
2025-12-04 03:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX2@172.18.168.20:5700/2) Recv SETPOWER cmd
2025-12-04 03:58:55 [DEBUG] ctrl_if_trx.py:207 (TRX3@172.18.168.20:5700/3) Recv SETPOWER cmd